Texas Instruments Hercules TMS570LS04x/03x LaunchPad Evaluation Kit LAUNCHXL-TMS57004 LAUNCHXL-TMS57004 数据表
产品代码
LAUNCHXL-TMS57004
SPNS186A – OCTOBER 2012 – REVISED SEPTEMBER 2013
TMS570LS0432/0332 16- and 32-Bit RISC Flash Microcontroller
Check for Samples:
1
TMS570LS0432/0332 16- and 32-Bit RISC Flash Microcontroller
1.1
Features
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• High-Performance Automotive-Grade
• Multiple Communication Interfaces
Microcontroller for Safety-Critical Applications
– Two CAN Controllers (DCANs)
– Dual CPUs Running in Lockstep
•
DCAN1 - 32 Mailboxes with Parity
– ECC on Flash and RAM Interfaces
Protection
– Built-In Self-Test for CPU and On-Chip RAMs
•
DCAN2 - 16 Mailboxes with Parity
Protection
Protection
– Error Signaling Module with Error Pin
•
Compliant to CAN Protocol Version 2.0B
– Voltage and Clock Monitoring
– Multibuffered Serial Peripheral Interface
• ARM® Cortex™ – R4 32-Bit RISC CPU
(MibSPI) Module
– Efficient 1.66 DMIPS/MHz with 8-Stage
•
128 Words with Parity Protection
Pipeline
– Two Standard Serial Peripheral Interface
– 8-Region Memory Protection Unit
(SPI) Modules
– Open Architecture with Third-Party Support
– UART (SCI) Interface with Local Interconnect
• Operating Conditions
Network (LIN 2.1) Interface Support
– 80-MHz System Clock
• High-End Timer (N2HET) Module
– Core Supply Voltage (V
CC
): 1.2-V Nominal
– Up to 19 Programmable Pins
– I/O Supply Voltage (V
CCIO
): 3.3-V Nominal
– 128-Word Instruction RAM with Parity
– ADC Supply Voltage (V
CCAD
): 3.3-V Nominal
Protection
• Integrated Memory
– Each Includes Hardware Angle Generator
– Up to 384KB of Program Flash with ECC
– Dedicated High-End Timer Transfer Unit
– 32KB of RAM with ECC
(HTU)
– 16KB of Flash for Emulated EEPROM with
• Enhanced Quadrature Encoder Pulse (eQEP)
ECC
Module
• Common Platform Architecture
– Motor Position Encoder Interface
– Consistent Memory Map Across Family
• 12-Bit Multibuffered Analog-to-Digital Converter
– Real-Time Interrupt (RTI) Timer (OS Timer)
(ADC) Module
– 96-Channel Vectored Interrupt Module (VIM)
– 16 Channels
– 2-Channel Cyclic Redundancy Checker
– 64 Result Buffers with Parity Protection
(CRC)
• Up to 45 General-Purpose I/O (GPIO) Capable
• Frequency-Modulated Phase-Locked Loop
Pins
(FMPLL) with Built-In Slip Detector
– 8 Dedicated GPIO Pins with up to 8 External
• IEEE 1149.1 JTAG, Boundary Scan and ARM
Interrupts
CoreSight™ Components
• Package
• Advanced JTAG Security Module (AJSM)
– 100-Pin Quad Flatpack (PZ) [Green]
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to
Copyright © 2012–2013, Texas Instruments Incorporated
specifications per the terms of the Texas Instruments standard warranty. Production
processing does not necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.