Texas Instruments Hercules TMS570LS04x/03x LaunchPad Evaluation Kit LAUNCHXL-TMS57004 LAUNCHXL-TMS57004 数据表
产品代码
LAUNCHXL-TMS57004
SPNS186A – OCTOBER 2012 – REVISED SEPTEMBER 2013
1.3
Description
The TMS570LS0432/0332 device is a high-performance automotive-grade microcontroller family for safety
systems. The safety architecture includes dual CPUs in lockstep, CPU and Memory Built-In Self Test
(BIST) logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback
capability on peripheral I/Os.
systems. The safety architecture includes dual CPUs in lockstep, CPU and Memory Built-In Self Test
(BIST) logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback
capability on peripheral I/Os.
The TMS570LS0432/0332 device integrates the ARM Cortex-R4 CPU which offers an efficient 1.66
DMIPS/MHz, and can run up to 80 MHz providing up to 132 DMIPS. The device supports the big-endian
[BE32] format.
DMIPS/MHz, and can run up to 80 MHz providing up to 132 DMIPS. The device supports the big-endian
[BE32] format.
The TMS570LS0432/0332 device has 384KB and 256KB integrated flash (respectively) and 32-KB data
RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a
nonvolatile, electrically erasable and programmable memory implemented with a 64-bit-wide data bus
interface. The flash operates on a 3.3-V supply input (same level as I/O supply) for all read, program, and
erase operations. When in pipeline mode, the flash operates with a system clock frequency of 80 MHz.
The SRAM supports single-cycle read and write accesses in byte, halfword, and word modes throughout
the supported frequency range.
RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a
nonvolatile, electrically erasable and programmable memory implemented with a 64-bit-wide data bus
interface. The flash operates on a 3.3-V supply input (same level as I/O supply) for all read, program, and
erase operations. When in pipeline mode, the flash operates with a system clock frequency of 80 MHz.
The SRAM supports single-cycle read and write accesses in byte, halfword, and word modes throughout
the supported frequency range.
The TMS570LS0432/0332 device features peripherals for real-time control-based applications, including a
Next Generation High-End Timer (N2HET) timing coprocessor with up to 19 total I/O terminals and a 12-
bit Analog-to-Digital Converter (ADC) supporting 16 inputs in the 100-pin package.
Next Generation High-End Timer (N2HET) timing coprocessor with up to 19 total I/O terminals and a 12-
bit Analog-to-Digital Converter (ADC) supporting 16 inputs in the 100-pin package.
The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time
applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer
micromachine and an attached I/O port. The N2HET can be used for pulse width modulated outputs,
capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring
multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer
Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory.
A Memory Protection Unit (MPU) is built into the HTU.
applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer
micromachine and an attached I/O port. The N2HET can be used for pulse width modulated outputs,
capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring
multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer
Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory.
A Memory Protection Unit (MPU) is built into the HTU.
The enhanced quadrature encoder pulse (eQEP) module is used for direct interface with a linear or rotary
incremental encoder to get position, direction, and speed information from a rotating machine as used in
high-performance motion and position-control systems.
incremental encoder to get position, direction, and speed information from a rotating machine as used in
high-performance motion and position-control systems.
The device has a 12-bit-resolution MibADC with 16 channels and 64 words of parity-protected buffer RAM.
The MibADC channels can be converted individually or can be grouped by software for sequential
conversion sequences. There are three separate groups. Each group can be converted once when
triggered or configured for continuous conversion mode.
The MibADC channels can be converted individually or can be grouped by software for sequential
conversion sequences. There are three separate groups. Each group can be converted once when
triggered or configured for continuous conversion mode.
The device has multiple communication interfaces: one MibSPI, two SPIs, one UART/LIN, and two
DCANs. The SPI provides a convenient method of serial interaction for high-speed communications
between similar shift-register type devices. The UART/LIN supports the Local Interconnect standard 2.1
and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format.
The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication
protocol that efficiently supports distributed real-time control with robust communication rates of up to 1
Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example,
automotive and industrial fields) that require reliable serial communication or multiplexed wiring.
DCANs. The SPI provides a convenient method of serial interaction for high-speed communications
between similar shift-register type devices. The UART/LIN supports the Local Interconnect standard 2.1
and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format.
The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication
protocol that efficiently supports distributed real-time control with robust communication rates of up to 1
Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example,
automotive and industrial fields) that require reliable serial communication or multiplexed wiring.
The frequency-modulated phase-locked loop (FMPLL) clock module is used to multiply the external
frequency reference to a higher frequency for internal use. The FMPLL provides one of the five possible
clock source inputs to the global clock module (GCM). The GCM manages the mapping between the
available clock sources and the device clock domains.
frequency reference to a higher frequency for internal use. The FMPLL provides one of the five possible
clock source inputs to the global clock module (GCM). The GCM manages the mapping between the
available clock sources and the device clock domains.
The device also has an external clock prescaler (ECP) module. When the ECP is enabled, it outputs a
continuous external clock on the ECLK pin. The ECLK frequency is a user-programmable ratio of the
peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an
indicator of the operating frequency of the device.
continuous external clock on the ECLK pin. The ECLK frequency is a user-programmable ratio of the
peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an
indicator of the operating frequency of the device.
Copyright © 2012–2013, Texas Instruments Incorporated
TMS570LS0432/0332 16- and 32-Bit RISC Flash Microcontroller
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