Texas Instruments Hercules TMS570LS04x/03x LaunchPad Evaluation Kit LAUNCHXL-TMS57004 LAUNCHXL-TMS57004 数据表
产品代码
LAUNCHXL-TMS57004
CPU 1
CPU 2
2 cycle delay
2 cycle delay
CCM-R4
CCM-R4
compare
CPU1CLK
CPU2CLK
compare
error
Input + Control
Output + Control
SPNS186A – OCTOBER 2012 – REVISED SEPTEMBER 2013
4.4.5
ARM Cortex-R4 CPU Compare Module (CCM) for Safety
This device has two ARM Cortex-R4 CPU cores, where the output signals of both CPUs are compared in
the CCM-R4 unit. To avoid common mode impacts the signals of the CPUs to be compared are delayed in
a different way as shown in the figure below.
the CCM-R4 unit. To avoid common mode impacts the signals of the CPUs to be compared are delayed in
a different way as shown in the figure below.
Figure 4-3. Dual Core Implementation
To avoid an erroneous CCM-R4 compare error, the application software must initialize the registers of
both CPUs before the registers are used, including function calls where the register values are pushed
onto the stack.
both CPUs before the registers are used, including function calls where the register values are pushed
onto the stack.
4.4.6
CPU Self-Test
The CPU STC (Self-Test Controller) is used to test the two Cortex-R4 CPU Cores using the Deterministic
Logic BIST Controller as the test engine.
Logic BIST Controller as the test engine.
The main features of the self-test controller are:
•
Ability to divide the complete test run into independent test intervals
•
Capable of running the complete test or running a few intervals at a time
•
Ability to continue from the last executed interval (test set) or to restart from the beginning (First test
set)
set)
•
Complete isolation of the self-tested CPU core from the rest of the system during the self-test run
•
Ability to capture the failure interval number
•
Timeout counter for the CPU self-test run as a fail-safe feature
4.4.6.1
Application Sequence for CPU Self-Test
1. Configure clock domain frequencies.
2. Select the number of test intervals to be run.
3. Configure the timeout period for the self-test run.
Copyright © 2012–2013, Texas Instruments Incorporated
System Information and Electrical Specifications
29
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