Freescale Semiconductor DEMO9S08DZ60 Demo Board DEMO9S08DZ60 DEMO9S08DZ60 数据表
产品代码
DEMO9S08DZ60
Appendix A Electrical Characteristics
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
387
Figure A-7. SPI Master Timing (CPHA = 0)
Figure A-8. SPI Master Timing (CPHA = 1)
SCK
(OUTPUT)
SCK
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
SS
1
(OUTPUT)
MSB IN
2
BIT 6 . . . 1
LSB IN
MSB OUT
2
LSB OUT
BIT 6 . . . 1
(CPOL = 0)
(CPOL = 1)
NOTES:
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
1. SS output mode (MODFEN = 1, SSOE = 1).
SCK
(OUTPUT)
SCK
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
MSB IN
(2)
BIT 6 . . . 1
LSB IN
MSB OUT
(2)
LSB OUT
BIT 6 . . . 1
(CPOL = 0)
(CPOL = 1)
SS
(1)
(OUTPUT)
1. SS output mode (MODFEN = 1, SSOE = 1).
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
NOTES: