Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 用户手册
产品代码
DEMO9S12XHY256
Background Debug Module (S12XBDMV2)
MC9S12XHY-Family Reference Manual Rev. 1.04
Freescale Semiconductor
215
Figure 5-9. BDM Target-to-Host Serial Bit Timing (Logic 1)
High-Impedance
Earliest
Start of
Next Bit
R-C Rise
10 Cycles
10 Cycles
Host Samples
BKGD Pin
Perceived
Start of Bit Time
BKGD Pin
BDM Clock
(Target MCU)
Host
Drive to
BKGD Pin
Target System
Speedup
Pulse
High-Impedance
High-Impedance