Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 用户手册

产品代码

DEMO9S12XHY256

Device Overview MC9S12XHY-Family

MC9S12XHY-Family Reference Manual, Rev. 1.04

Freescale Semiconductor

Vector base + $CC

Port R

I bit

PIER (PIER3-

PIER0)

yes

Vector base + $CA

Port S

I bit

PIES (PIES6-

PIES5)

yes

Vector base + $C8

Reserved

I bit

Vector base + $C6

CRG PLL lock

I bit

CRGINT(LOCKI

Refer to CRG

interrupt section

Vector base + $C4

CRG self-clock mode

I bit

CRGINT(SCMIE

)

Refer to CRG

interrupt section

Vector base + $C2

Reserved

Vector base + $C0

IIC bus

I bit

IBCR(IBIE)

yes

Vector base + $BE

Vector base + $BC

Reserved

Vector base + $BA

FLASH Fault Detect

I bit

FCNFG2

(SFDIE, DFDIE)

yes

Vector base + $B8

FLASH

I bit

FCNFG (CCIE)

yes

Vector base + $B6

CAN0 wake-up

I bit

CANRIER

(WUPIE)

yes

Vector base + $B4

CAN0 errors

I bit

CANRIER

(CSCIE, OVRIE)

yes

Vector base + $B2

CAN0 receive

I bit

CANRIER

(RXFIE)

yes

Vector base + $B0

CAN0 transmit

I bit

CANTIER

(TXEIE[2:0])

yes

Vector base+ $AE

TIM1 timer channel 0

I bit

TIM1TIE (C0I)

yes

Vector base + $AC

TIM1 timer channel 1

I bit

TIM1TIE (C1I)

yes

Vector base+ $AA

TIM1 timer channel 2

I bit

TIM1TIE (C2I)

yes

Vector base+ $A8

TIM1 timer channel 3

I bit

TIM1TIE (C3I)

yes

Vector base+ $A6

TIM1 timer channel 4

I bit

TIM1TIE (C4I)

yes

Vector base + $A4

TIM1 timer channel 5

I bit

TIM1TIE (C5I)

yes

Vector base+ $A2

TIM1 timer channel 6

I bit

TIM1TIE (C6I)

yes

Vector base+ $A0

TIM1 timer channel 7

I bit

TIM1TIE (C7I)

yes

Vector base+ $9E

TIM1 timer overflow

I bit

TIM1TSRC2

(TOF)

yes

Vector base+ $9C

TIM1 Pulse accumulator A overflow

I bit

TIM1PACTL

(PAOVI)

yes

Table 1-11. Interrupt Vector Locations (Sheet 2 of 4)

Vector Address

(1)

Interrupt Source

CCR

Mask

Local Enable

Stop

wakeup

Wait

wakeup