Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 用户手册

Freescale Semiconductor

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The Port Integration Module includes these distinctive registers:

•

Data registers and data direction registers for Ports A, B, H, T, S, P, R, M,U, V and AD when used
as general purpose I/O

•

Control registers to enable/disable pull devices and select pull-ups/pull-downs on Ports H, T, S, P,
R,M, U and V on per-pin basis

•

Control registers to enable/disable pull-up devices on Port AD on per-pin basis

•

Single control register to enable/disable pull-down on Ports A and B, on per-port basis and

•

Single control register to enable/disable pull-up on BKGD pin

•

Control registers to enable/disable open-drain (wired-or) mode on Ports H, R,M and S.Control
register to enable/disable slew rate control on Port U and Port V

•

Interrupt flag register for pin interrupts on Ports R, Port S, Port T and AD

•

Control register to configure IRQ/XIRQ pin operation

•

Routing register to support module port relocation

•

Free-running clock outputs

A standard port pin has the following minimum features:

•

Input/output selection

•

5V output drive 5V digital and analog input

•

Input with selectable pull-up or pull-down device

Optional features supported on dedicated pins:

•

Open drain for wired-or connections

•

Interrupt inputs with glitch filtering

•

The output slew rate control

This section lists and describes the signals that do connect off-chip.

 shows all the pins and their functions that are controlled by the Port Integration Module.

If there is more than one function associated with a pin, the priority is
indicated by the position in the table from top (highest priority) to bottom
(lowest priority).

-

BKGD

MODC

2

I

MODC input during RESET

BKGD

BKGD

I/O BDM communication pin