Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 用户手册
产品代码
DEMO9S12XHY256
Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
69
H
PH[7:4]
FP[26:23]
O
LCD frontplane segment driver output
GPIO
GPIO
I/O General purpose
PH[3]
FP[22]
O
LCD frontplane segment driver output
SS
I/O SS of SPI, mappable through software
GPIO
I/O General purpose
PH[2]
FP[21]
O
LCD frontplane segment driver output
SCK
I/O SCK of SPI, mappable through software
ECLK
O
Free-running clock at bus clock rate or programmable
down-scaled bus clock
down-scaled bus clock
GPIO
I/O General purpose
PH[1]
FP[20]
O
LCD frontplane segment driver output
TXD1
I/O Serial Communication Interface(SCI1) transmit pin
MOSI
I/O MOSI of SPI, mappable through software
GPIO
I/O General purpose
PH[0]
FP[19]
O
LCD frontplane segment driver output
RXD1
I/O Serial Communication Interface(SCI1) receive pin
MISO
I/O MISO of SPI, mappable through software
GPIO
I/O General purpose
M
PM[3:2]
IOC1[3:2]
I/O TIM1 channel [3:2], mappable through software
GPIO
PWM[7:6]
I/O Pulse Width Modulator channel 7 - 6
GPIO
I/O General purpose
PM[1]
TXD1
O
TXD of SCI1
IOC0[3]
I/O TIM0 channel [3], mappable through software
PWM[5]
I/O Pulse Width Modulator channel 5
GPIO
I/O General purpose
PM[0]
RXD1
I
RXD of SCI1
IOC0[2]
I/O TIM0 channel [2], mappable through software
PWM[4]
I/O Pulse Width Modulator channel 4
GPIO
I/O General purpose
P
PP[7:0]
FP[7:0]
O
LCD frontplane segment driver output
GPIO
PWM[7:0]
I/O Pulse Width Modulator channel 7 - 0
GPIO
I/O General purpose
Port
Pin Name
Pin Function
& Priority
1
I/O
Description
Pin Function
after Reset