Analog Devices ADP2291 Evaluation Board ADP2291RM-EVALZ ADP2291RM-EVALZ 数据表

ADP2291 

 

 

Rev. A | Page 16 of 20 

Use the following general guidelines when designing printed 
circuit boards:  

•  Keep the output capacitor as close to the BAT and GND 

pins as possible.  

•  Keep the input capacitor as close to the IN and GND pins 

as possible.  

•  PC board traces with larger cross-sectional areas remove 

more heat from the pass transistor. For optimum heat 
transfer, specify thick copper and use wide traces.  

•  Use additional copper layers or planes to reduce thermal 

resistance. When connecting to other layers, use multiple 
vias if possible.  

The LFCSP package has an exposed die paddle on the bottom 
that efficiently conducts heat to the PCB. To achieve the 
optimum performance from the LFCSP package, give special 
consideration to the layout of the PCB. Use the following layout 
guidelines for the LFCSP package:  

•  The pad pattern is shown in Figure 27. Follow the pad 

dimension closely for reliable solder joints, while 
maintaining reasonable clearances to prevent solder 
bridging.  

•  The thermal pad of the LFCSP package provides a low 

thermal impedance path (approximately 20°C/W) to the 
PCB; therefore, a properly designed PCB effectively con-
ducts the heat away from the package. This is achieved by 
adding thermal vias to the PCB that provide a thermal path 
to the inner or bottom layers.  

Note that the via diameter is small to prevent the solder 
from flowing through the via and leaving voids in the 
thermal pad solder joint.  

Note also that the thermal pad is attached to the die sub-
strate; therefore, the thermal planes to which the vias 
attach the package must be electrically isolated or 
connected to GND. 

•  The solder mask opening should be about 120 microns 

(4.7 mils) larger than the pad size, resulting in a minimum 
of 60 microns (2.4 mils) clearance between the pad and the 
solder mask. 

•  The paste mask opening is typically designed to match the 

pad size used on the peripheral pads of the LFCSP package. 
This should provide a reliable solder joint as long as the 
stencil thickness is about 0.125 mm. The paste mask for the 
thermal pad needs to be designed for the maximum coverage 
to effectively remove the heat from the package. However, 
due to the presence of thermal vias and the size of the ther-
mal pad, eliminating voids may not be possible. 

•  The recommended paste mask stencil thickness is 

0.125 mm. Use a laser cut stainless steel stencil with 
trapezoidal walls. 

•  Use a no-clean, Type 3 solder paste for mounting the 

LFCSP package. A nitrogen purge during the reflow 
process is recommended. 

•  The package manufacturer recommends that the reflow 

temperature not exceed 220°C and the time above liquidus 
be less than 75 seconds. Make sure the preheat ramp is 
3°C/second or lower. The actual temperature profile 
depends on the board’s density and should be determined 
by the assembly house. 

× VIAS, 0.250∅

µm PLATING

04873-027

 

V

X

The voltage on Pin X.  

V

RS

The regulation setpoint for the voltage across the 
sense resistor (RS).  

V

BAT, EOC

The battery voltage at the point charging current is 
1/10 the current setpoint.  

I

MAX

The charge current corresponding to VRS, 
including the effects of ADJ pin voltage.  

C rate 

The charge current (mA) expressed as a multiple of 
the nominal battery capacity (mAh). A 900 mAh 
capacity battery, charged at a 1/10 C rate, is 
equivalent to a 90 mA charge current.