Renesas Stereo System SH7709S 用户手册
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Rev. 5.00, 09/03, page 155 of 760
Bits 3 and 2—Read/Write Select A (RWA1, RWA0): Selects the read cycle or write cycle as the
bus cycle of the channel A break condition.
bus cycle of the channel A break condition.
Bit 3: RWA1
Bit 2: RWA0
Description
0
0
Condition comparison is not performed
(Initial value)
1
The break condition is the read cycle
1
0
The break condition is the write cycle
1
The break condition is the read cycle or write cycle
Bits 1 and 0—Operand Size Select A (SZA1, SZA0): Selects the operand size of the bus cycle
for the channel A break condition.
for the channel A break condition.
Bit 1: SZA1
Bit 0: SZA0
Description
0
0
The break condition does not include operand size
(Initial value)
1
The break condition is byte access
1
0
The break condition is word access
1
The break condition is longword access