Texas Instruments SM320C6455-EP 用户手册
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Serial RapidIO
(Descriptor)
EMAC
HPI
M
M
M
128-bit
(SYSCLK2)
M3
M0
S
S
M
M
M
M
S
TCP2
VCP2
S
McBSPs
S
UTOPIA
S
DDR2
Memory
Controller
S
EMIFA
S
PCI
S
MASTER
SLAVE
S
M
Bridge
CFG
SCR
SCR
S
Bridge
PCI
M
EDMA3 Channel
Controller
EDMA3
Transfer
Controllers
Megamodule
M1
M2
S3
S0
S1
S2
M
Serial
RapidIO
(Data)
S
S
Events
M
Megamodule
Data SCR
Bridge
128 (SYSCLK2)
128 (SYSCLK2)
128 (SYSCLK2)
128 (SYSCLK2)
32 (SYSCLK3)
32
(SYSCLK3)
32 (SYSCLK3)
32
(SYSCLK3)
(SYSCLK3)
128 (SYSCLK2)
128 (SYSCLK2)
128 (SYSCLK2)
32
(SYSCLK3)
128
(SYSCLK2)
64 (SYSCLK2)
64 (SYSCLK2)
Bridge
Bridge
Bridge
128
(SYSCLK3)
Bridge
Bridge
128
(SYSCLK2)
128
(SYSCLK2)
64
(SYSCLK2)
64
(SYSCLK2)
32
(SYSCLK3)
32 (SYSCLK2)
Configuration Bus
Data Bus
Data Bus
S
128
(SYSCLK2)
128
(SYSCLK2)
M
M
32 (SYSCLK3)
128 (SYSCLK2)
32
(SYSCLK3)
32 (SYSCLK3)
32
(SYSCLK3)
SM320C6455-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008
Figure 4-1. Switched Central Resource Block Diagram
System Interconnect
83