National Instruments Printer Accessories 320030-01 用户手册
Register Descriptions
Chapter 4
GPIB-1014 User Manual
4-52
© National Instruments Corporation
Bit
Mnemonic
Description
2r/w
0
Reserved Bit
Write a zero to this bit.
1-0r/w
PCL
Peripheral Control Line Bits 1 through 0
Each of the four DMAC channels has a Peripheral Control Line (called
PCL0* through PCL3*). The two PCL bits define the function of each
line. The GPIB-1014 uses the four lines as status inputs. On PCL0*,
GPIB signal SRQ* is connected. On PCL2*, signal REN* is
connected. If programmed as status inputs, you can determine the
state (high or low) of these two GPIB signals by reading the PCS bit in
the appropriate CSR. PCL1* is designed to detect an interrupt from
the TLC, synchronization of the GPIB handshake, or a bus error during
a DMA transfer. PCL1* must be set to 01 (status input with interrupt)
if interrupts are used, or 00 (status input) if polling is used. This is
described in more detail in the Interrupts section of Chapter 5. PCL3*
is left unconnected.
PCL0* through PCL3*). The two PCL bits define the function of each
line. The GPIB-1014 uses the four lines as status inputs. On PCL0*,
GPIB signal SRQ* is connected. On PCL2*, signal REN* is
connected. If programmed as status inputs, you can determine the
state (high or low) of these two GPIB signals by reading the PCS bit in
the appropriate CSR. PCL1* is designed to detect an interrupt from
the TLC, synchronization of the GPIB handshake, or a bus error during
a DMA transfer. PCL1* must be set to 01 (status input with interrupt)
if interrupts are used, or 00 (status input) if polling is used. This is
described in more detail in the Interrupts section of Chapter 5. PCL3*
is left unconnected.
00 =
Status Input (can be read by reading CSR)
01 =
Status Input with Interrupt
10 =
Start Output Pulse, Negative 1/8 CLK
11 =
Abort Input