Silicon Image Drive SSD-P08G(I)-3521 数据表
E
LECTRICAL
S
PECIFICATION
SSD-P
XXX
(I)-3521 D
ATA
S
HEET
S
ILICON
S
YSTEMS
P
ROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3521P-02DSR
P
AGE
18
F
EBRUARY
2, 2009
Attribute and Common Memory Write Timing
Figure 3: Attribute and Common Memory Write Timing Diagram
Table 13: Attribute and Common Memory Write Timing
Symbol
Parameter
Minimum
Maximum
Units
t
WR
Write Cycle Time
100
-
ns
t
WLWH
Write Pulse Width
60
-
ns
t
AVWL
Address Setup Time
10
-
ns
t
AVWH
Address Setup Time for WE
70
-
ns
t
ELWH
Card Enable Setup Time for WE
70
-
ns
t
WHDX
Data Hold Time
10
-
ns
t
WHAX
Write Recover Time
15
-
ns
t
WLQZ
Output Disable Time from WE
-
75
ns
t
OLWH
Output Disable Time from OE
-
100
ns
t
WHOX
Output Enable Time from WE
5
-
ns
t
OHDX
Output Enable Time from OE
5
-
ns
t
WLOL
Output Enable Setup for WE
10
-
ns
t
WHOL
Output Enable Hold from WE
10
-
ns
t
ELWL
Card Enable Setup Time before WE
0
-
ns
t
GHEH
Card Enable Hold Time from WE
15
-
ns
t
DVWH
Data Setup Time
40
-
ns
____
A[10::0],REG
A[10::0],REG
__
CE
__
OE
___
WE
WE
D[15:0](Dout)
D[15:0](Dout)
t
WR
t
ELWH
t
ELWL
t
AVWH
t
GHEH
t
AVWL
t
WLWH
t
WHAX
t
WLOL
t
WLQZ
t
OLWH
t
WHOX
t
DVWH
t
WHOL
t
WHDX
t
OHDX