Silicon Image Drive SSD-P08G(I)-3521 数据表
E
LECTRICAL
S
PECIFICATION
SSD-P
XXX
(I)-3521 D
ATA
S
HEET
S
ILICON
S
YSTEMS
P
ROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3521P-02DSR
P
AGE
19
F
EBRUARY
2, 2009
I/O Access Read Timing
Figure 4: I/O Access Read Timing Diagram
Note:
(1) IOIS16 and INPACK are not supported.
Table 14: I/O Access Read Timing
Symbol
Parameter
Minimum
Maximum
Units
t
DVRL
Data Delay after IORD
-
50
ns
t
IGHQX
Data Hold following IORD
5
-
ns
t
IGLIGH
IORD Pulse Width
65
-
ns
t
AVIGL
Address Setup before IORD
25
-
ns
t
GHAX
Address Hold following IORD
10
-
ns
t
CLIGL
CE Setup before IORD
5
-
ns
t
CHIGH
CE Hold following IORD
10
-
ns
t
RLIGL
REG Setup before IORD
5
-
ns
t
RHIGH
REG Hold following IORD
0
-
ns
t
IGLINL
INPACK Delay falling from IORD
-
(1)
ns
t
IGHINH
INPACK Delay Rising from IORD
-
(1)
ns
t
AVISL
IOIS16 Delay Falling from Address
-
(1)
ns
t
AXISH
IOIS16 Delay Rising from Address
-
(1)
ns
A[10::0]
____
REG
REG
__
CE
___
IORD
______
INPACK
______
IOIS16
t
RLIGL
t
GHAX
D[15::0]
t
CLIGL
t
CHIGH
t
RHIGH
t
IGLIGH
t
AVIGL
t
IGHINH
t
IGLINL
t
AXISH
t
AVISL
t
DVRL
t
IGHQX