Silverstone SST-ST56F-V3.2 用户手册
2.3.2 Definition
The ripple voltage of the outputs shall be measured at the pins of the output connector
when terminated in the load impedance specified in figure 1. Ripple and noise are measured
at the connectors with a 0.1uF ceramic capacitor and a 10uF electrolytic capacitor to simulate
system loading. Ripple shall be measured under any condition of line voltage, output load, line
frequency, operation temperature.
at the connectors with a 0.1uF ceramic capacitor and a 10uF electrolytic capacitor to simulate
system loading. Ripple shall be measured under any condition of line voltage, output load, line
frequency, operation temperature.
2.3.3 Ripple voltage test circuit
Figure 1. Ripple voltage test circuit
2.4 Overshoot
Any overshoot at turn on or turn off shall be less 10% of the nominal voltage
value, all outputs shall be within the regulation limit of section 2.0 before issuing the
power good signal of section 4.0.
power good signal of section 4.0.
2.5 Efficiency
Greater than 80% typical at normal AC main voltage and full load on all output
2.6 Remote ON/OFF control
When the logic level "PS-ON" is low, the DC outputs are to be enabled.
When the logic level is high or open collector, the DC outputs are to be disabled.
When the logic level is high or open collector, the DC outputs are to be disabled.