Fujitsu mb91192 用户手册

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The port has three registers per bit, namely DDR, PDR, and PFS (port function select register), and the port

input/output setup and function selection can be executed independently per bit. The peripheral function is

selected for pins whose PFS is "1", whereas the port function is selected for those whose PFS is "0". Pins

whose DDR is "1" are set to Output, whereas pins whose DDR is "0" are set to Input.

The PFS is initialized by a reset and the port function is selected. Also, the PDR is undefined, and the DDR

is cleared to "0" and the port is specified to Input.

The value written to the PDR is output to the pin at the time of output setup by specifying the DDR per bit.

At this time, the contents of the PDR are read from the read value of the PDR.

At the time of the input setup, the pin will have high impedance status. At this time, the pin level is read

from the read value of the PDR. 

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Pin

Peripheral input

P17 to P10

Peripheral output

PDR

DDR

Data register read

PFS