Fujitsu mb91192 用户手册
148
CHAPTER 6 FG Input
6.3
Drum Input
The drum input section comprises of the 4-bit programmable divider and mask timer.
This section explains the operation of each section and control register.
This section explains the operation of each section and control register.
■
Block Diagram of Drum Input
Figure 6.3-1 Block diagram of Drum Input
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Register List of Drum Input
Figure 6.3-2 Register list of Drum Input
S
R
Internal bus
DFGD
DFCLR
DMTS
MTCS
DINV
CAPC
00
00
QS
R1
R2
R2
4bit
2
14
/fch
2
10
/fch
DFG
DPGD
DPCLR
DPGE
DPG
R
D Q
R Q
S
S
3
7
0
2
Programmable devider
Write ST
Load (Sync)
Load (Sync)
DRMDVC
(from FRC
FRC9,13)
FRC9,13)
M
P
X
P
X
DRMMTC
Mask Timer
DVCFG Free
(Mask Disable)
Mask End
START (Mask Enable)
DVDFG
(to FRC)
(to FRC)
RS-FF
7
bit
Drum control register
Drum input control register
Drum mask timer control register
Address:
000053
H
000054
H
000055
H
DRMC
DRMDVC
DRMMTC
0