用户手册目录Front Cover1FOR SAFE OPERATION2Revision History3Preface5Important Alert Items9Manual Organization11Contents13Illustrations20Figures20Tables22CHAPTER 1 Device Overview251.1 Features261.1.1 Functions and performance261.1.2 Adaptability261.1.3 Interface271.2 Device Specifications281.2.1 Specifications summary281.2.2 Model and product number291.3 Power Requirements Voltage [V]301.4 Environmental Specifications321.5 Acoustic Noise331.6 Shock and Vibration331.7 Reliability341.8 Error Rate351.9 Media Defects351.10 Load/Unload Function351.11 Advanced Power Management36CHAPTER 2 Device Configuration392.1 Device Configuration402.2 System Configuration412.2.1 ATA interface412.2.2 1 drive connection412.2.3 2 drives connection42CHAPTER 3 Installation Conditions433.1 Dimensions443.2 Mounting453.3 Cable Connections513.3.1 Device connector513.3.2 Cable connector specifications523.3.3 Device connection523.3.4 Power supply connector (CN1)533.4 Jumper Settings533.4.1 Location of setting jumpers533.4.2 Factory default setting543.4.3 Master drive-slave drive setting543.4.4 CSEL setting553.4.5 Power up in standby setting56CHAPTER 4 Theory of Device Operation574.1 Outline584.2 Subassemblies584.2.1 Disk584.2.2 Spindle584.2.3 Actuator584.2.4 Air filter594.3 Circuit Configuration594.4 Power-on Sequence624.5 Self-calibration634.5.1 Self-calibration contents634.5.2 Execution timing of self-calibration644.5.3 Command processing during self-calibration644.6 Read/write Circuit654.6.1 Read/write preamplifier (PreAMP)654.6.2 Write circuit654.6.3 Read circuit664.6.4 Digital PLL circuit674.7 Servo Control684.7.1 Servo control circuit684.7.2 Data-surface servo format714.7.3 Servo frame format734.7.4 Actuator motor control744.7.5 Spindle motor control75CHAPTER 5 Interface775.1 Physical Interface785.1.1 Interface signals785.1.2 Signal assignment on the connector795.2 Logical Interface825.2.1 I/O registers835.2.2 Command block registers845.2.3 Control block registers895.3 Host Commands905.3.1 Command code and parameters905.3.2 Command descriptions945.3.3 Error posting2035.4 Command Protocol2055.4.1 PIO Data transferring commands from device to host2055.4.2 PIO Data transferring commands from host to device2085.4.3 Commands without data transfer2105.4.4 Other commands2115.4.5 DMA data transfer commands2115.5 Ultra DMA Feature Set2135.5.1 Overview2135.5.2 Phases of operation2145.5.3 Ultra DMA data in commands2145.5.4 Ultra DMA data out commands2195.5.5 Ultra DMA CRC rules2235.5.6 Series termination required for Ultra DMA2245.6 Timing2255.6.1 PIO data transfer2255.6.2 Multiword data transfer2265.6.3 Ultra DMA data transfer2275.6.4 Power-on and reset240CHAPTER 6 Operations2416.1 Device Response to the Reset2426.1.1 Response to power-on2426.1.2 Response to hardware reset2436.1.3 Response to software reset2456.1.4 Response to diagnostic command2466.2 Power Save2476.2.1 Power save mode2476.2.2 Power commands2496.3 Defect Processing2496.3.1 Spare area2496.3.2 Alternating processing for defective sectors2506.3.2 Alternating processing for defective sectors2506.4 Read-ahead Cache2526.4.1 DATA buffer structure2526.4.2 Caching operation2536.4.3 Using the read segment buffer2556.5 Write Cache2596.5.1 Cache operation259Glossary263Acronyms and Abbreviations267Index269Comment Form275Back Cover280文件大小: 1.4 MB页数: 280Language: English打开用户手册