用户手册目录Contents31 General Description72 Features73 Pin Assignment84 Block Diagram85 Pin Description95.1 EM78P259NP/M95.2 EM78P260NP/M/KM106 Function Description116.1 Operational Registers116.1.1 R0 (Indirect Address Register)116.1.2 R1 (Time Clock /Counter)116.1.3 R2 (Program Counter) and Stack116.1.3.1 Data Memory Configuration136.1.4 R3 (Status Register)146.1.5 R4 (RAM Select Register)156.1.6 R5 ~ R6 (Port 5 ~ Port 6)156.1.7 R7 (Port 7)156.1.8 R8 (AISR: ADC Input Select Register)166.1.9 R9 (ADCON: ADC Control Register)176.1.10 RA (ADOC: ADC Offset Calibration Register)186.1.11 RB (ADDATA: Converted Value of ADC)196.1.12 RC (ADDATA1H: Converted Value of ADC)196.1.13 RD (ADDATA1L: Converted Value of ADC)196.1.14 RE (Interrupt Status 2 & Wake-up Control Register)196.1.15 RF (Interrupt Status 2 Register)206.1.16 R10 ~ R3F206.2 Special Purpose Registers216.2.1 A (Accumulator)216.2.2 CONT (Control Register)216.2.3 IOC50 ~ IOC70 (I/O Port Control Register)226.2.4 IOC80 (Comparator and TCCA Control Register)226.2.5 IOC90 (TCCB and TCCC Control Register)236.2.6 IOCA0 (IR and TCCC Scale Control Register)246.2.7 IOCB0 (Pull-down Control Register)266.2.8 IOCC0 (Open-Drain Control Register)266.2.9 IOCD0 (Pull-high Control Register)276.2.10 IOCE0 (WDT Control & Interrupt Mask Registers 2)276.2.11 IOCF0 (Interrupt Mask Register)286.2.12 IOC51 (TCCA Counter)296.2.13 IOC61 (TCCB Counter)296.2.14 IOC71 (TCCBH/MSB Counter)306.2.15 IOC81 (TCCC Counter)306.2.16 IOC91 (Low Time Register)316.2.17 IOCA1 (High Time Register)316.2.18 IOCB1 High/Low Time Scale Control Register)326.2.19 IOCC1 (TCC Prescaler Counter)326.3 TCC/WDT and Prescaler336.4 I/O Ports346.4.1 Usage of Port 5 Input Change Wake-up/Interrupt Function376.5 Reset and Wake-up376.5.1 Reset and Wake-up Operation376.5.1.1 Wake-Up and Interrupt Modes Operation Summary406.5.1.2 Register Initial Values after Reset426.5.1.3 Controller Reset Block Diagram466.5.2 The T and P Status under STATUS (R3) Register476.6 Interrupt476.7 Analog-to-Digital Converter (ADC)506.7.1 ADC Control Register (AISR/R8, ADCON/R9, ADOC/RA)506.7.1.1 R8 (AISR: ADC Input Select Register)506.7.1.2 R9 (ADCON: AD Control Register)516.7.1.3 RA (ADOC: AD Offset Calibration Register)526.7.2 ADC Data Register (ADDATA/RB, ADDATA1H/RC,ADDATA1L/RD)536.7.3 ADC Sampling Time536.7.4 AD Conversion Time536.7.5 ADC Operation during Sleep Mode546.7.6 Programming Process/Considerations546.7.6.1 Programming Process546.7.6.2 Sample Demo Programs556.8 Infrared Remote Control Application/PWM WaveformGeneration576.8.1 Overview576.8.2 Function Description586.8.3 Programming the Related Registers606.9 Timer/Counter626.9.1 Overview626.9.2 Function Description626.9.3 Programming the Related Registers646.10 Comparator646.10.1 External Reference Signal656.10.2 Comparator Output656.10.3 Using a Comparator as an Operation Amplifier666.10.4 Comparator Interrupt666.10.5 Wake-up from Sleep Mode666.11 Oscillator676.11.1 Oscillator Modes676.11.2 Crystal Oscillator/Ceramic Resonators (Crystal)686.11.3 External RC Oscillator Mode696.11.4 Internal RC Oscillator Mode706.12 Power-on Considerations716.12.1 Programmable WDT Time-out Period716.12.2 External Power-on Reset Circuit716.12.3 Residual Voltage Protection726.13 Code Option736.13.1 Code Option Register (Word 0)736.13.2 Code Option Register (Word 1)746.13.3 Customer ID Register (Word 2)756.14 Instruction Set757 Absolute Maximum Ratings778 DC Electrical Characteristics788.1 AD Converter Characteristics808.2 Comparator (OP) Characteristics818.3 Device Characteristics819 AC Electrical Characteristic8210 Timing Diagrams83APPENDIX84A Package Type84B Package Information84B.1 18-Lead Plastic Dual in line (PDIP) — 300 mil84B.2 18-Lead Plastic Small Outline (SOP) — 300 mil85B.3 20-Lead Plastic Shrink Small Outline (SSOP) — 209 mil86B.4 20-Lead Plastic Dual-in-line (PDIP) — 300 mil87B.5 20-Lead Plastic Small Outline (SOP) — 300 mil88C Quality Assurance and Reliability89C.1 Address Trap Detect89文件大小: 870.2 KB页数: 89Language: English打开用户手册