用户手册目录653X User Manual1Important Information3Warranty3Copyright3Trademarks3WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS3Compliance4Conventions6Contents7Chapter 1 Getting Started with Your 653X10653X Device Overview10Control Lines10What You Need to Get Started11Choosing Your Programming Software12National Instruments Application Software12NIDAQ Driver Software13Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and Your Hardware13Installing Your Software14Unpacking Your 653XDevice14Installing Your 653XDevice15Installing the PCI-DIO-32HS, PCI-6534, or PCI-7030/653315Installing the PXI-6533, PXI-6534, or PXI-7030/653316Installing the AT-DIO-32HS16Installing the DAQCard-6533 for PCMCIA17Configuring the 653X17In Windows17In Mac OS18Chapter 2 Using Your 653X19Choosing the Correct Mode for Your Application19Controlling and Monitoring Static Digital Lines—Unstrobed I/O20Configuring Digital Lines20Standard Output20Wired-OR Output20Using Control Lines as Extra Unstrobed Data Lines21Table 2-1. Port 4 Lines22Connecting Signals22Creating a Program22Figure 2-1. Programming Unstrobed I/O in NI-DAQ23Figure 2-2. Programming Unstrobed I/O in LabVIEW/LabVIEW RT23Programming the Control/Timing Lines as Extra Unstrobed Data Lines23Transferring Data Between Two Devices—HandshakingI/O24Deciding the Width of Data to Transfer24Table 2-2. Port and Timing Controller Combinations24Deciding Data Transfer Direction24Deciding Which Handshaking Protocol to Use25Using the Burst Protocol25Deciding the PCLK Signal Direction25Selecting ACK/REQ Signal Polarity26Choosing Whether or Not to Use a Programmable Delay26Choosing Continuous or Finite Data Transfer27Finite Transfers27Continuous Input27Continuous Output27Choosing DMA or Interrupt Transfers28Connecting Signals28Figure 2-3. Connecting Signals29Choosing the Startup Sequence29Using an Initialization Order29Controlling Line Polarities30Creating a Program30Figure 2-4. Programming Buffered Handshaking I/O in NI-DAQ31Figure 2-5. Programming Unbuffered Handshaking I/O in NI-DAQ32Figure 2-6. Programming Handshaking Input in LabVIEW/LabVIEW RT33Figure 2-7. Programming Handshaking Output in LabVIEW/LabVIEW RT34Generating and Receiving Digital Patterns and Waveforms—Pattern I/O35Deciding the Width of Data to Transfer35Table 2-3. Port and Timing Controller Combinations35Deciding Transfer Direction36Choosing an Internal or External REQ Source36Deciding the REQ Polarity36Deciding the Transfer Rate36Deciding How to Start and Stop Data Transfer—Triggering37Figure 2-8. Starting Data Transfer Using a Trigger37Figure 2-9. Stopping Data Transfer Using a Trigger38Start and Stop Trigger38Figure 2-10. Using a Start and Stop Trigger38Figure 2-11. Pattern-Matching Trigger Example39Choosing Continuous or Finite Data Transfer39Finite Transfers39Continuous Input39Continuous Output40Choosing DMA or Interrupt Transfers40Monitoring Data Transfer41Connecting Signals41Creating a Program42Figure 2-12. Programming Pattern I/O (Single Buffer) in NI-DAQ42Figure 2-13. Programming Pattern I/O (Continuous) in NI-DAQ43Figure 2-14. Programming Pattern I/O in LabVIEW/LabVIEW RT43Monitoring Line State—Change Detection44Deciding the Width of Data to Acquire44Table 2-4. Port and Timing Controller Combinations44Deciding Which Lines You Want to Monitor45Figure 2-15. Change Detection Example Settings45Deciding How to Start and Stop Data Transfer—Triggering45Figure 2-16. Starting Data Transfer Using a Trigger46Figure 2-17. Stopping Data Transfer Using a Trigger46Start and Stop Trigger46Figure 2-18. Using a Start and Stop Trigger47Figure 2-19. Pattern-Detection Trigger Example48Choosing Continuous or Finite Data Transfer48Finite Transfers48Continuous Input48Choosing DMA or Interrupt Transfers49Connecting Signals49Creating a Program49Figure 2-20. Programming Change Detection (Continuous) in NI-DAQ50Figure 2-21. Programming Change Detection (Single Buffer) in NI-DAQ50Figure 2-22. Programming Change Detection for LabVIEW/LabVIEW RT51Chapter 3 Timing Diagrams52Pattern I/O Timing Diagrams52Internal REQ Signal Source52Figure 3-1. Internal Request Timing Diagram53External REQ Signal Source53Figure 3-2. External Request Timing Diagram54Handshaking I/O Timing Diagrams55Comparing the Different Handshaking Protocols55Table 3-1. Handshaking Protocol Characteristics55Using the Burst Protocol56Figure 3-3. Burst Transfer Example (Input)57Figure 3-4. Burst Transfer Example (Output)57Figure 3-5. Burst Input Timing Diagram (Default)59Figure 3-6. Burst Output Timing Diagram (Default)60Figure 3-7. Burst Input Timing Diagram (PCLK Reversed)61Figure 3-8. Burst Output Timing Diagram (PCLK Reversed)62Using Asynchronous Protocols63Using the 8255-Emulation Protocol63Figure 3-9. 8255 Emulation Input Handshaking Sequence64Figure 3-10. 8255 Emulation Input State Machine65Figure 3-11. 8255 Emulation Output Handshaking Sequence66Figure 3-12. 8255 Emulation Output State Machine67Figure 3-13. 8255 Emulation Output Timing Diagram68Using the LevelACK Protocol69Figure 3-14. Level ACK Input Handshaking Sequence69Figure 3-15. Level ACK Input State Machine70Figure 3-16. Level ACK Input Timing Diagram71Figure 3-17. Level ACK Output Handshaking Sequence72Figure 3-18. Level ACK Output State Machine73Figure 3-19. Level ACK Output Timing Diagram74Using Protocols Based on Signal Edges75Using the Trailing-Edge Protocol76Figure 3-20. Trailing Edge Input Handshaking Sequence76Figure 3-21. Trailing Edge Input State Machine76Figure 3-22. Trailing Edge Input Timing Diagram77Figure 3-23. Trailing Edge Output Handshaking Sequence78Figure 3-24. Trailing Edge Output State Machine78Figure 3-25. Trailing Edge Output Timing Diagram79Figure 3-26. Leading Edge Input Handshaking Sequence80Figure 3-27. Leading Edge Input State Machine81Figure 3-28. Leading Edge Input Timing Diagram82Figure 3-29. Leading Edge Output Handshaking Sequence83Figure 3-30. Leading Edge Output State Machine84Figure 3-31. Leading Edge Output Timing Diagram85Figure 3-32. Long Pulse Input Handshaking Sequence86Figure 3-33. Long Pulse Input State Machine87Figure 3-34. Long Pulse Input Timing Diagram88Figure 3-35. Long Pulse Output Handshaking Sequence89Figure 3-36. Long Pulse Output State Machine90Figure 3-37. Long Pulse Output Timing Diagram91Appendix A Specifications92Appendix B Using PXI with CompactPCI97Table B-1. J2 Pins Used by Your PXI-653X Device97Appendix C Connecting Signals with Accessories98Control Signals98Table C-1. Control Signals for Handshaking I/O and Pattern I/O98Making 68-Pin Signal Connections99Figure C-1. 653X I/O Connector 68-Pin Assignments99Table C-2. 68-Pin Accessories100Signal Descriptions100Table C-3. Signal Descriptions101Making 50-Pin Signal Connections103Figure C-2. 68-to-50-Pin Adapter Pin Assignments103Table C-4. 50-Pin Accessories104Optional Equipment for Connecting Signals104Appendix D Hardware Considerations105Figure D-1. AT-DIO-32HS Block Diagram105Figure D-2. DAQCard-6533 for PCMCIA Block Diagram106Figure D-3. PCI-DIO-32HS, PCI/PXI-7030/6533, and PXI-6533 Block Diagram107Figure D-4. PCI/PXI-6534 Block Diagram108Power-On State109Power Connections109Table D-1. 653X Power Ratings109Selecting and Terminating Cables110Figure D-5. Transmission Line Terminations112How Much Current Can I Sink or Source?113Table D-2. Sink and Source Current for the 653X Devices113RTSI and PXI Trigger Bus Interfaces114Figure D-6. RTSI Bus Signal Connection115Appendix E Optimizing Your Transfer Rates116Determining the Maximum Transfer Rates116Table E-1. Peak Transfer Rates Based on Mode and Protocol Used116Obtaining the Fastest Transfer Rates117Table E-2. Devices That Support Direct-Memory Access (DMA) Transfers117Interpreting Benchmark Results118Table E-3. AT-DIO-32HS Benchmark Results119Table E-4. PCI-DIO-32HS Benchmark Results119Table E-5. PXI-6533 Benchmark Results120Table E-6. DAQCard-6533 for PCMCIA Benchmark Results121Table E-7. PCI-6534 Benchmark Results121Table E-8. PXI-6534 Benchmark Results122Table E-9. PCI-7030/6533 Benchmark Results123Table E-10. PCI-7030/6533 Benchmark Results123Appendix F Technical Support Resources125Glossary127Numbers/Symbols127A-C128D129F130G-L131M-P132R-S133T-V134W135Index136Numbers136A136B-C137D138E-H139I-N141O-P142R143S144T-V146W147文件大小: 1.1 MB页数: 147Language: English打开用户手册
用户手册目录653X User Manual1Important Information3Warranty3Copyright3Trademarks3WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS3Compliance4Conventions6Contents7Chapter 1 Getting Started with Your 653X10653X Device Overview10Control Lines10What You Need to Get Started11Choosing Your Programming Software12National Instruments Application Software12NIDAQ Driver Software13Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and Your Hardware13Installing Your Software14Unpacking Your 653XDevice14Installing Your 653XDevice15Installing the PCI-DIO-32HS, PCI-6534, or PCI-7030/653315Installing the PXI-6533, PXI-6534, or PXI-7030/653316Installing the AT-DIO-32HS16Installing the DAQCard-6533 for PCMCIA17Configuring the 653X17In Windows17In Mac OS18Chapter 2 Using Your 653X19Choosing the Correct Mode for Your Application19Controlling and Monitoring Static Digital Lines—Unstrobed I/O20Configuring Digital Lines20Standard Output20Wired-OR Output20Using Control Lines as Extra Unstrobed Data Lines21Table 2-1. Port 4 Lines22Connecting Signals22Creating a Program22Figure 2-1. Programming Unstrobed I/O in NI-DAQ23Figure 2-2. Programming Unstrobed I/O in LabVIEW/LabVIEW RT23Programming the Control/Timing Lines as Extra Unstrobed Data Lines23Transferring Data Between Two Devices—HandshakingI/O24Deciding the Width of Data to Transfer24Table 2-2. Port and Timing Controller Combinations24Deciding Data Transfer Direction24Deciding Which Handshaking Protocol to Use25Using the Burst Protocol25Deciding the PCLK Signal Direction25Selecting ACK/REQ Signal Polarity26Choosing Whether or Not to Use a Programmable Delay26Choosing Continuous or Finite Data Transfer27Finite Transfers27Continuous Input27Continuous Output27Choosing DMA or Interrupt Transfers28Connecting Signals28Figure 2-3. Connecting Signals29Choosing the Startup Sequence29Using an Initialization Order29Controlling Line Polarities30Creating a Program30Figure 2-4. Programming Buffered Handshaking I/O in NI-DAQ31Figure 2-5. Programming Unbuffered Handshaking I/O in NI-DAQ32Figure 2-6. Programming Handshaking Input in LabVIEW/LabVIEW RT33Figure 2-7. Programming Handshaking Output in LabVIEW/LabVIEW RT34Generating and Receiving Digital Patterns and Waveforms—Pattern I/O35Deciding the Width of Data to Transfer35Table 2-3. Port and Timing Controller Combinations35Deciding Transfer Direction36Choosing an Internal or External REQ Source36Deciding the REQ Polarity36Deciding the Transfer Rate36Deciding How to Start and Stop Data Transfer—Triggering37Figure 2-8. Starting Data Transfer Using a Trigger37Figure 2-9. Stopping Data Transfer Using a Trigger38Start and Stop Trigger38Figure 2-10. Using a Start and Stop Trigger38Figure 2-11. Pattern-Matching Trigger Example39Choosing Continuous or Finite Data Transfer39Finite Transfers39Continuous Input39Continuous Output40Choosing DMA or Interrupt Transfers40Monitoring Data Transfer41Connecting Signals41Creating a Program42Figure 2-12. Programming Pattern I/O (Single Buffer) in NI-DAQ42Figure 2-13. Programming Pattern I/O (Continuous) in NI-DAQ43Figure 2-14. Programming Pattern I/O in LabVIEW/LabVIEW RT43Monitoring Line State—Change Detection44Deciding the Width of Data to Acquire44Table 2-4. Port and Timing Controller Combinations44Deciding Which Lines You Want to Monitor45Figure 2-15. Change Detection Example Settings45Deciding How to Start and Stop Data Transfer—Triggering45Figure 2-16. Starting Data Transfer Using a Trigger46Figure 2-17. Stopping Data Transfer Using a Trigger46Start and Stop Trigger46Figure 2-18. Using a Start and Stop Trigger47Figure 2-19. Pattern-Detection Trigger Example48Choosing Continuous or Finite Data Transfer48Finite Transfers48Continuous Input48Choosing DMA or Interrupt Transfers49Connecting Signals49Creating a Program49Figure 2-20. Programming Change Detection (Continuous) in NI-DAQ50Figure 2-21. Programming Change Detection (Single Buffer) in NI-DAQ50Figure 2-22. Programming Change Detection for LabVIEW/LabVIEW RT51Chapter 3 Timing Diagrams52Pattern I/O Timing Diagrams52Internal REQ Signal Source52Figure 3-1. Internal Request Timing Diagram53External REQ Signal Source53Figure 3-2. External Request Timing Diagram54Handshaking I/O Timing Diagrams55Comparing the Different Handshaking Protocols55Table 3-1. Handshaking Protocol Characteristics55Using the Burst Protocol56Figure 3-3. Burst Transfer Example (Input)57Figure 3-4. Burst Transfer Example (Output)57Figure 3-5. Burst Input Timing Diagram (Default)59Figure 3-6. Burst Output Timing Diagram (Default)60Figure 3-7. Burst Input Timing Diagram (PCLK Reversed)61Figure 3-8. Burst Output Timing Diagram (PCLK Reversed)62Using Asynchronous Protocols63Using the 8255-Emulation Protocol63Figure 3-9. 8255 Emulation Input Handshaking Sequence64Figure 3-10. 8255 Emulation Input State Machine65Figure 3-11. 8255 Emulation Output Handshaking Sequence66Figure 3-12. 8255 Emulation Output State Machine67Figure 3-13. 8255 Emulation Output Timing Diagram68Using the LevelACK Protocol69Figure 3-14. Level ACK Input Handshaking Sequence69Figure 3-15. Level ACK Input State Machine70Figure 3-16. Level ACK Input Timing Diagram71Figure 3-17. Level ACK Output Handshaking Sequence72Figure 3-18. Level ACK Output State Machine73Figure 3-19. Level ACK Output Timing Diagram74Using Protocols Based on Signal Edges75Using the Trailing-Edge Protocol76Figure 3-20. Trailing Edge Input Handshaking Sequence76Figure 3-21. Trailing Edge Input State Machine76Figure 3-22. Trailing Edge Input Timing Diagram77Figure 3-23. Trailing Edge Output Handshaking Sequence78Figure 3-24. Trailing Edge Output State Machine78Figure 3-25. Trailing Edge Output Timing Diagram79Figure 3-26. Leading Edge Input Handshaking Sequence80Figure 3-27. Leading Edge Input State Machine81Figure 3-28. Leading Edge Input Timing Diagram82Figure 3-29. Leading Edge Output Handshaking Sequence83Figure 3-30. Leading Edge Output State Machine84Figure 3-31. Leading Edge Output Timing Diagram85Figure 3-32. Long Pulse Input Handshaking Sequence86Figure 3-33. Long Pulse Input State Machine87Figure 3-34. Long Pulse Input Timing Diagram88Figure 3-35. Long Pulse Output Handshaking Sequence89Figure 3-36. Long Pulse Output State Machine90Figure 3-37. Long Pulse Output Timing Diagram91Appendix A Specifications92Appendix B Using PXI with CompactPCI97Table B-1. J2 Pins Used by Your PXI-653X Device97Appendix C Connecting Signals with Accessories98Control Signals98Table C-1. Control Signals for Handshaking I/O and Pattern I/O98Making 68-Pin Signal Connections99Figure C-1. 653X I/O Connector 68-Pin Assignments99Table C-2. 68-Pin Accessories100Signal Descriptions100Table C-3. Signal Descriptions101Making 50-Pin Signal Connections103Figure C-2. 68-to-50-Pin Adapter Pin Assignments103Table C-4. 50-Pin Accessories104Optional Equipment for Connecting Signals104Appendix D Hardware Considerations105Figure D-1. AT-DIO-32HS Block Diagram105Figure D-2. DAQCard-6533 for PCMCIA Block Diagram106Figure D-3. PCI-DIO-32HS, PCI/PXI-7030/6533, and PXI-6533 Block Diagram107Figure D-4. PCI/PXI-6534 Block Diagram108Power-On State109Power Connections109Table D-1. 653X Power Ratings109Selecting and Terminating Cables110Figure D-5. Transmission Line Terminations112How Much Current Can I Sink or Source?113Table D-2. Sink and Source Current for the 653X Devices113RTSI and PXI Trigger Bus Interfaces114Figure D-6. RTSI Bus Signal Connection115Appendix E Optimizing Your Transfer Rates116Determining the Maximum Transfer Rates116Table E-1. Peak Transfer Rates Based on Mode and Protocol Used116Obtaining the Fastest Transfer Rates117Table E-2. Devices That Support Direct-Memory Access (DMA) Transfers117Interpreting Benchmark Results118Table E-3. AT-DIO-32HS Benchmark Results119Table E-4. PCI-DIO-32HS Benchmark Results119Table E-5. PXI-6533 Benchmark Results120Table E-6. DAQCard-6533 for PCMCIA Benchmark Results121Table E-7. PCI-6534 Benchmark Results121Table E-8. PXI-6534 Benchmark Results122Table E-9. PCI-7030/6533 Benchmark Results123Table E-10. PCI-7030/6533 Benchmark Results123Appendix F Technical Support Resources125Glossary127Numbers/Symbols127A-C128D129F130G-L131M-P132R-S133T-V134W135Index136Numbers136A136B-C137D138E-H139I-N141O-P142R143S144T-V146W147文件大小: 1.1 MB页数: 147Language: English打开用户手册