用户手册 — Texas Instruments TAS2505 Evaluation Module TAS2505EVM

目录

• 1 INTRODUCTION

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  • 1.1 Features

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  • 1.2 Applications

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  • 1.3 Description

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• 2  PACKAGE AND SIGNAL DESCRIPTIONS

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  • 2.1  Package/Ordering Information

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  • 2.2 Device Information

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• 3 ELECTRICAL SPECIFICATIONS

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  • 3.1  Absolute Maximum Ratings

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  • 3.2 THERMAL INFORMATION

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  • 3.3  Recommended Operating Conditions

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  • 3.4  Electrical Characteristics

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  • 3.5 Timing Characteristics

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    • 3.5.1 I2S/LJF/RJF Timing in Master Mode

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    • 3.5.2 I2S/LJF/RJF Timing in Slave Mode

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    • 3.5.3 DSP Timing in Master Mode

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    • 3.5.4 DSP Timing in Slave Mode

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    • 3.5.5 I2C Interface Timing

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    • 3.5.6 SPI Interface Timing

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    • Timing Requirements

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• 4 Typical Performance

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  • 4.1 Class D Speaker Driver Performance

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  • 4.2 HP Driver Performance

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• 5 Application Overview

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  • 5.1 Typical Circuit Configuration

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  • 5.2 Circuit Configuration with Internal LDO

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  • 5.3 Device Connections

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    • 5.3.1 Digital Pins

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    • 5.3.2 Analog Pins

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    • 5.3.3 Multifunction Pins

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  • 5.4 Audio Analog I/O

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  • 5.5 Analog Signals

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    • 5.5.1 Analog Inputs AINL and AINR

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  • 5.6 Audio DAC and Audio Analog Outputs

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    • 5.6.1 DAC

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      • 5.6.1.1 DAC Processing Blocks — Overview

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    • 5.6.2 Digital Mixing and Routing

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    • 5.6.3 Analog Audio Routing

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    • 5.6.4 5V LDO

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    • 5.6.5 POR

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    • 5.6.6 CLOCK Generation and PLL

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    • 5.6.7 Digital Audio and Control Interface

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      • 5.6.7.1 Digital Audio Interface

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      • 5.6.7.2 Control Interface

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      • 5.6.7.3 Power Supply

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      • 5.6.7.4 Device Special Functions

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• 6 Register Map

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  • 6.1 Register Map Summary

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• Revision History

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