Intel 253668-032US User Manual
Vol. 3 16-47
DEBUGGING, PROFILING BRANCHES AND TIME-STAMP COUNTER
tion or interrupt being generated. When an exception or interrupt occurs, the
contents of the LastBranchToIP and LastBranchFromIP MSRs are copied into these
registers before the to and from addresses of the exception or interrupt are recorded
in the LastBranchToIP and LastBranchFromIP MSRs.
These registers can be read using the RDMSR instruction.
Note that the values stored in the LastBranchToIP, LastBranchFromIP, LastException-
ToIP, and LastExceptionFromIP MSRs are offsets into the current code segment, as
opposed to linear addresses, which are saved in last branch records for the Pentium
4 and Intel Xeon processors.
contents of the LastBranchToIP and LastBranchFromIP MSRs are copied into these
registers before the to and from addresses of the exception or interrupt are recorded
in the LastBranchToIP and LastBranchFromIP MSRs.
These registers can be read using the RDMSR instruction.
Note that the values stored in the LastBranchToIP, LastBranchFromIP, LastException-
ToIP, and LastExceptionFromIP MSRs are offsets into the current code segment, as
opposed to linear addresses, which are saved in last branch records for the Pentium
4 and Intel Xeon processors.
16.10.3 Monitoring Branches, Exceptions, and Interrupts
When the LBR flag in the DEBUGCTLMSR register is set, the processor automatically
begins recording branches that it takes, exceptions that are generated (except for
debug exceptions), and interrupts that are serviced. Each time a branch, exception,
or interrupt occurs, the processor records the to and from instruction pointers in the
LastBranchToIP and LastBranchFromIP MSRs. In addition, for interrupts and excep-
tions, the processor copies the contents of the LastBranchToIP and LastBranch-
FromIP MSRs into the LastExceptionToIP and LastExceptionFromIP MSRs prior to
recording the to and from addresses of the interrupt or exception.
When the processor generates a debug exception (#DB), it automatically clears the
LBR flag before executing the exception handler, but does not touch the last branch
and last exception MSRs. The addresses for the last branch, interrupt, or exception
taken are thus retained in the LastBranchToIP and LastBranchFromIP MSRs and the
addresses of the last branch prior to an interrupt or exception are retained in the
LastExceptionToIP, and LastExceptionFromIP MSRs.
The debugger can use the last branch, interrupt, and/or exception addresses in
combination with code-segment selectors retrieved from the stack to reset break-
points in the breakpoint-address registers (DR0 through DR3), allowing a backward
trace from the manifestation of a particular bug toward its source. Because the
instruction pointers recorded in the LastBranchToIP, LastBranchFromIP, LastExcepti-
onToIP, and LastExceptionFromIP MSRs are offsets into a code segment, software
must determine the segment base address of the code segment associated with the
control transfer to calculate the linear address to be placed in the breakpoint-address
registers. The segment base address can be determined by reading the segment
selector for the code segment from the stack and using it to locate the segment
descriptor for the segment in the GDT or LDT. The segment base address can then be
read from the segment descriptor.
Before resuming program execution from a debug-exception handler, the handler
must set the LBR flag again to re-enable last branch and last exception/interrupt
recording.
begins recording branches that it takes, exceptions that are generated (except for
debug exceptions), and interrupts that are serviced. Each time a branch, exception,
or interrupt occurs, the processor records the to and from instruction pointers in the
LastBranchToIP and LastBranchFromIP MSRs. In addition, for interrupts and excep-
tions, the processor copies the contents of the LastBranchToIP and LastBranch-
FromIP MSRs into the LastExceptionToIP and LastExceptionFromIP MSRs prior to
recording the to and from addresses of the interrupt or exception.
When the processor generates a debug exception (#DB), it automatically clears the
LBR flag before executing the exception handler, but does not touch the last branch
and last exception MSRs. The addresses for the last branch, interrupt, or exception
taken are thus retained in the LastBranchToIP and LastBranchFromIP MSRs and the
addresses of the last branch prior to an interrupt or exception are retained in the
LastExceptionToIP, and LastExceptionFromIP MSRs.
The debugger can use the last branch, interrupt, and/or exception addresses in
combination with code-segment selectors retrieved from the stack to reset break-
points in the breakpoint-address registers (DR0 through DR3), allowing a backward
trace from the manifestation of a particular bug toward its source. Because the
instruction pointers recorded in the LastBranchToIP, LastBranchFromIP, LastExcepti-
onToIP, and LastExceptionFromIP MSRs are offsets into a code segment, software
must determine the segment base address of the code segment associated with the
control transfer to calculate the linear address to be placed in the breakpoint-address
registers. The segment base address can be determined by reading the segment
selector for the code segment from the stack and using it to locate the segment
descriptor for the segment in the GDT or LDT. The segment base address can then be
read from the segment descriptor.
Before resuming program execution from a debug-exception handler, the handler
must set the LBR flag again to re-enable last branch and last exception/interrupt
recording.