Nxp Semiconductors PBLS4004D User Manual
PBLS4004D_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 6 January 2009
5 of 15
NXP Semiconductors
PBLS4004D
40 V PNP BISS loadswitch
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
values
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
values
006aaa462
10
1
10
2
10
3
Z
th(j-a)
(K/W)
10
−
1
10
−
5
10
10
−
2
10
−
4
10
2
10
−
1
t
p
(s)
10
−
3
10
3
1
0.75
0.5
0.33
0.2
0.1
0.5
0.33
0.2
0.1
δ
= 1
0.05
0.02
0.01
0
006aaa463
10
1
10
2
10
3
Z
th(j-a)
(K/W)
10
−
5
10
10
−
2
10
−
4
10
2
10
−
1
t
p
(s)
10
−
3
10
3
1
0.75
0.5
0.33
0.2
0.33
0.2
0.1
δ
= 1
0.05
0.02
0.01
0