Atmel Evaluation Board using the SAM7SE Microcontroller AT91SAM7SE-EK AT91SAM7SE-EK Data Sheet

6295A–ATARM–27-Mar-07

• Main oscillator and its PLL

• Advanced Interrupt Controller

• Watchdog

These operations are often grouped into one C function. Since it is likely the function tries to
access the stack, the stack pointer (r13) must be set to the top memory address before the call:

ldr sp, =STACK_ADDR

ldr r0, =AT91C_LowLevelInit

mov lr, pc

bx r0

After carrying out all of these actions, the program can jump to the main application.

The following sections explain why these peripherals are considered critical, and detail the
required operations to configure them properly. 

Whenever the microcontroller core runs too fast for the internal Flash, it uses one or more wait
states, i.e. cycles during which it does nothing but wait for the memory. The number of wait
states can be configured in the EFC. 

After reset, the chip uses its internal slow clock (cadenced at 32 kHz), so there is no need for
any wait state. However, before switching to the main oscillator (in order to run at full-speed), the
correct number of wait states must be set. If not, the core may no longer be able to read the
code from the Flash.

Configuring the number of wait states is done in the Flash Mode Register (FMR) of the EFC. For
example, a 48 MHz operation requires the use of one wait state:

AT91C_BASE_MC->MC_FMR = AT91C_FMR_FWS_1FWS;

For more information about the required number of wait states depending on the operating fre-
quency of a microcontroller, please refer to the AC Electrical Characteristics section of the
corresponding datasheet.

After reset, the chip is running using a slow clock, which is cadenced at 32 kHz. The main oscil-
lator and its Phase Lock Loop (PLL) must be configured in order to run at full speed. Both can be
configured in the Power Management Controller (PMC).

The first step is to enable the main oscillator and wait for it to stabilize. Writing the oscillator star-
tup time and the MOSCEN bit in the Main Oscillator Register (MOR) of the PMC starts the
oscillator; stabilization occurs when bit MOSCS of the PMC Status Register becomes set. The
following piece of code performs these two operations:

AT91C_BASE_PMC->PMC_MOR = (AT91C_CKGR_OSCOUNT & (0x8 << 8))

| AT91C_CKGR_MOSCEN;

while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));

Calculation of the correct oscillator startup time value is done by looking at the DC characteris-
tics given in the datasheet of the product. Note that the internal slow clock of the AT91SAM7SE
is generated using a RC oscillator; this must be taken into account as this impacts the slow clock
accuracy. Here is an example:

RC oscillator frequency range in kHz: 

22

42

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