Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
26
SAM9M10 [SUMMARY]
6355ES–ATARM–12-Mar-13
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SAM-BA Boot in case no valid program is detected in external NVM, supporting
z
Serial communication on a DBGU
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USB Device HS Port
7.2.4.2 BMS = 0, boot on external memory
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Boot on on-chip RC
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Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit data bus, Read/Write
controlled by Chip Select, allows boot on 16-bit non-volatile memory.
controlled by Chip Select, allows boot on 16-bit non-volatile memory.
For optimization purpose, nothing else is done. To speed up the boot sequence user programmed software should
perform a complete configuration:
perform a complete configuration:
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Enable the 32768 Hz oscillator if best accuracy needed
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Program the PMC (main oscillator enable or bypass mode)
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Program and Start the PLL
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Reprogram the SMC setup, cycle, hold, mode timings registers for EBI CS0 to adapt them to the new clock
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Switch the main clock to the new value
7.3
External Memories
The SAM9M10 features a Multi-port DDR2 Interface and an External Bus Interface allowing to connect to a wide range of
external memories and to any parallel peripheral.
external memories and to any parallel peripheral.
7.3.1
DDRSDRC0 Multi-port DDRSDR Controller
Four AHB Interfaces, Management of All Accesses Maximizes Memory Bandwidth and Minimizes Transaction Latency.
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Supports AHB Transfers:
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Word, Half Word, Byte Access.
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Supports DDR2, LPDDR
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Numerous Configurations Supported
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2K, 4K, 8K, 16K Row Address Memory Parts
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DDR2 with Four Internal Banks
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DDR2/LPDDR with 16-bit Data Path
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One Chip Select for DDR2/LPDDR Device (256 Mbytes Address Space)
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Programming Facilities
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Multibank Ping-pong Access (Up to 4 Banks Opened at Same Time = Reduces Average Latency of
Transactions)
Transactions)
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Timing Parameters Specified by Software
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Automatic Refresh Operation, Refresh Rate is Programmable
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Automatic Update of DS, TCR and PASR Parameters
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Energy-saving Capabilities
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Self-refresh, Power-down and Deep Power Modes Supported
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Power-up Initialization by Software
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CAS Latency of 2, 3 Supported
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Reset function supported (DDR2)
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Auto Precharge Command Not Used
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On Die Termination not supported
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OCD mode not supported
7.3.2
External Bus Interface
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Integrates Three External Memory Controllers: