Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 248
Signal Descriptions 
A-12
Copyright © 2001-2003 ARM Limited. All rights reserved.
ARM DDI0198D
A.7
ETM interface signals
Table A-6 describes the ARM926EJ-S processor ETM interface signals.
Table A-6 ETM interface signals
Name
Direction
Description
ETMBIGEND
Output
ETM big-endian configuration indication.
ETMCHSD[1:0]
Output
ETM coprocessor handshake decode signals.
ETMCHSE[1:0]
Output
ETM coprocessor handshake execute signals.
ETMDA[31:0]
Output
ETM data address.
ETMDABORT
Output
ETM data abort.
ETMDBGACK
Output
ETM debug mode indication.
ETMDMAS[1:0]
Output
ETM data size indication.
ETMDMORE
Output
ETM more sequential data indication.
ETMDnMREQ
Output
ETM data memory request.
ETMDnRW
Output
ETM data not read/write.
ETMDSEQ
Output
ETM sequential data indication.
ETMEN
Input
Synchronous ETM interface enable. This signal 
must be tied LOW if an ETM is not used.
ETMHIVECS
Output
ETM exception vectors configuration.
ETMIA[31:0]
Output
ETM instruction address.
ETMIABORT
Output
ETM instruction abort.
ETMID15TO11[15:11]
Output
ETM instruction data field bits [15:11].
ETMID31TO25[31:25]
Output
ETM instruction data field bits [31:25].
ETMIJBIT
Output
ETM Jazelle state indication.
ETMInMREQ
Output
ETM instruction memory request.
ETMINSTREXEC
Output
ETM instruction execute indication.
ETMINSTRVALID
Output
ETM instruction valid indication.
ETMISEQ
Output
ETM sequential instruction access.