Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

Product codes
AT91SAM9X35-EK
Page of 1301
1173
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.7.53 High End Overlay Layer Channel Disable Register
Name: 
LCDC_HEOCHDR
Address:
0xF8038284
Access: 
Write-only
Reset: 
0x00000000
• CHDIS: Channel Disable Register
When set to one, this field disables the layer at the end of the current frame. The frame is completed.
• CHRST: Channel Reset Register
When set to one, this field resets the layer immediately. The frame is aborted.
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CHRST
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CHDIS