Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet
Product codes
AT91SAM9X35-EK
1175
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.7.55 High End Overlay Layer Interrupt Enable Register
Name:
LCDC_HEOIER
Address:
0xF803828C
Access:
Write-only
Reset:
0x00000000
• DMA: End of DMA Transfer Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
• DSCR: Descriptor Loaded Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
• ADD: Head Descriptor Loaded Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
• DONE: End of List Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
• OVR: Overflow Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
• UDMA: End of DMA Transfer for U or UV Chrominance Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
• UDSCR: Descriptor Loaded for U or UV Chrominance Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
• UADD: Head Descriptor Loaded for U or UV Chrominance Interrupt Enable Register
0: No effect.
1: Interrupt source is enabled.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
VOVR
VDONE
VADD
VDSCR
VDMA
–
–
15
14
13
12
11
10
9
8
–
UOVR
UDONE
UADD
UDSCR
UDMA
–
–
7
6
5
4
3
2
1
0
–
OVR
DONE
ADD
DSCR
DMA
–
–