Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet
Product codes
AT91SAM9X35-EK
780
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
Figure 39-22. Parity Error
39.7.3.9 Multidrop Mode
If the PAR field in the Mode Register (US_MR) is programmed to the value 0x6 or 0x07, the USART runs in Multidrop
Mode. This mode differentiates the data characters and the address characters. Data is transmitted with the parity bit to
0 and addresses are transmitted with the parity bit to 1.
Mode. This mode differentiates the data characters and the address characters. Data is transmitted with the parity bit to
0 and addresses are transmitted with the parity bit to 1.
If the USART is configured in multidrop mode, the receiver sets the PARE parity error bit when the parity bit is high and
the transmitter is able to send a character with the parity bit high when the Control Register is written with the SENDA bit
to 1.
the transmitter is able to send a character with the parity bit high when the Control Register is written with the SENDA bit
to 1.
To handle parity error, the PARE bit is cleared when the Control Register is written with the bit RSTSTA to 1.
The transmitter sends an address byte (parity bit set) when SENDA is written to US_CR. In this case, the next byte
written to US_THR is transmitted as an address. Any character written in US_THR without having written the command
SENDA is transmitted normally with the parity to 0.
written to US_THR is transmitted as an address. Any character written in US_THR without having written the command
SENDA is transmitted normally with the parity to 0.
39.7.3.10 Transmitter Timeguard
The timeguard feature enables the USART interface with slow remote devices.
The timeguard function enables the transmitter to insert an idle state on the TXD line between two characters. This idle
state actually acts as a long stop bit.
state actually acts as a long stop bit.
The duration of the idle state is programmed in the TG field of the Transmitter Timeguard Register (US_TTGR). When
this field is programmed to zero no timeguard is generated. Otherwise, the transmitter holds a high level on TXD after
each transmitted byte during the number of bit periods programmed in TG in addition to the number of stop bits.
this field is programmed to zero no timeguard is generated. Otherwise, the transmitter holds a high level on TXD after
each transmitted byte during the number of bit periods programmed in TG in addition to the number of stop bits.
As illustrated in
, the behavior of TXRDY and TXEMPTY status bits is modified by the programming of a
timeguard. TXRDY rises only when the start bit of the next character is sent, and thus remains to 0 during the timeguard
transmission if a character has been written in US_THR. TXEMPTY remains low until the timeguard transmission is
completed as the timeguard is part of the current character being transmitted.
transmission if a character has been written in US_THR. TXEMPTY remains low until the timeguard transmission is
completed as the timeguard is part of the current character being transmitted.
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Start
Bit
Bad
Parity
Bit
Stop
Bit
Baud Rate
Clock
Write
US_CR
PARE
RXRDY
RSTSTA = 1