Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
1057
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
48.13.2.2 Read Timings
Table 48-26. SMC Read Signals - NRD Controlled (READ_MODE= 1)
Symbol
Parameter
Min
Units
VDDIOM supply
1.8V
3.3V
NO HOLD SETTINGS (nrd hold = 0)
SMC
1
Data Setup before NRD High
13.7
11.8
ns
SMC
2
Data Hold after NRD High
0
0
ns
HOLD SETTINGS (nrd hold
≠ 0)
SMC
3
Data Setup before NRD High
10.7
8.8
ns
SMC
4
Data Hold after NRD High
0
0
ns
HOLD or NO HOLD SETTINGS (nrd hold
≠ 0, nrd hold =0)
SMC
5
NBS0/A0, NBS1, NBS2/A1, NBS3, A2 -
A25 Valid before NRD High
A25 Valid before NRD High
(nrd setup + nrd pulse)* t
CPMCK
-
5.3
(nrd setup + nrd pulse)*
t
CPMCK
- 5.1
ns
SMC
6
NCS low before NRD High
(nrd setup + nrd pulse - ncs rd
setup) * t
CPMCK
-4.8
(nrd setup + nrd pulse -
ncs rd setup) * t
CPMCK
- 4.9
ns
SMC
7
NRD Pulse Width
nrd pulse * t
CPMCK
- 3.4
nrd pulse * t
CPMCK
- 3.5
ns
Table 48-27. SMC Read Signals - NCS Controlled (READ_MODE= 0)
Symbol
Parameter
Min
Units
VDDIOM supply
1.8V
3.3V
NO HOLD SETTINGS (ncs rd hold = 0)
SMC
8
Data Setup before NCS High
26.7
24.7
ns
SMC
9
Data Hold after NCS High
0
0
ns
HOLD SETTINGS (ncs rd hold
≠ 0)
SMC
10
Data Setup before NCS High
12.4
10.4
ns
SMC
11
Data Hold after NCS High
0
0
ns
HOLD or NO HOLD SETTINGS (ncs rd hold
≠ 0, ncs rd hold = 0)
SMC
12
NBS0/A0, NBS1, NBS2/A1, NBS3, A2 -
A25 valid before NCS High
A25 valid before NCS High
(ncs rd setup + ncs rd pulse)*
t
CPMCK
- 18.1
(ncs rd setup + ncs rd
pulse)* t
CPMCK
- 18.2
ns
SMC
13
NRD low before NCS High
(ncs rd setup + ncs rd pulse - nrd
setup)* t
CPMCK
- 2.8
(ncs rd setup + ncs rd pulse
- nrd setup)* t
CPMCK
- 2.9
ns
SMC
14
NCS Pulse Width
ncs rd pulse length * t
CPMCK
- 4.0
ncs rd pulse length * t
CPMCK
- 4.0
ns