Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
1071
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Notes: 1. 1.8V domain: VDDIO from 1.65V to 1.95V, maximum external capacitor = 20pF
2. 3.3V domain: VDDIO from 3.0V to 3.6V, maximum external capacitor = 40pF.
48.15.5 UDP
Figure 48-25. USB Data Signal Rise and Fall Times
SPI
10
MOSI Setup time before SCK falls 
2 * MCK + 2.6
2 * MCK + 2.4
ns
SPI
11
MOSI Hold time after SCK falls
1.5
1.2
ns
SPI
12
NPCS0 setup to SCK rising
2.5 * MCK + 1.4
2.5 * MCK + 1.1
ns
SPI
13
NPCS0 hold after SCK falling
1.5 * MCK + 2.4
1.5 * MCK + 2.1
ns
SPI
14
NPCS0 setup to SCK falling
2.5 * MCK + 1.1
2.5 * MCK + 1.0
ns
SPI
15
NPCS0 hold after SCK rising
1.5 * MCK + 1.8
1.5 * MCK + 1.6
ns
Table 48-36. USART SPI Timings (Continued)
Symbol
Parameter
Conditions
Min
Max
Units
10%
10%
90%
V
CRS
t
R
t
F
Differential
Data Lines
Rise Time
Fall Time
Fosc = 6 MHz/750 kHz
R
EXT
=27 ohms
C
load
Buffer
(b)
(a)
Table 48-37. In Full Speed
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
t
FR
Transition Rise Time
C
LOAD
 = 50 pF
4
20
ns
t
FE
Transition Fall Time
C
LOAD
 = 50 pF
4
20
ns
t
FRFM
Rise/Fall time Matching
90
111.11
%