Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
1070
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 48-24. USART SPI Slave mode: (Mode 0 or 3)
SCK
MISO
MOSI
SPI
9
SPI
10
SPI
11
NSS
SPI
14
SPI
15
Table 48-36. USART SPI Timings
Symbol
Parameter
Conditions
Min
Max
Units
Master Mode
SPI
0
SCK Period
MCK/6
ns
SPI
1
Input Data Setup Time
0.5 * MCK + 3.5
0.5 * MCK + 3.3
ns
SPI
2
Input Data Hold Time
1.5 * MCK + 1.1
1.5 * MCK + 0.8
ns
SPI
3
Chip Select Active to Serial Clock
1.5 * SCK - 1.9
1.5 * SCK - 2.5
ns
SPI
4
Output Data Setup Time
0
0
7.6
8.4
ns
SPI
5
Serial Clock to Chip Select Inactive
1 *SCK - 7.1
1 *SCK - 7.8
ns
Slave Mode
SPI
6
SCK falling to MISO
3.8
3.0
19.5
16.6
ns
SPI
7
MOSI Setup time before SCK rises
2 * MCK + 3.0
2 * MCK + 2.7
ns
SPI
8
MOSI Hold time after SCK rises
1.5
1.3
ns
SPI
9
SCK rising to MISO
3.6
2.9
19.1
16.6
ns