Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

170

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

The following step must be added to bypass the 32768 Hz Oscillator.



An external clock must be connected on XIN32.



Enable the bypass path OSC32BYP bit set to 1.



Disable the 32768 Hz oscillator by setting the bit OSC32EN to 0.

The same procedure must be followed to switch from a 32,768 Hz crystal to the internal 32 kHz RC oscillator. 



Switch the master clock to a source different from slow clock (PLL or Main Oscillator). 



Enable the internal 32 kHz RC oscillator for low power by setting the bit RCEN to 1



Wait internal 32 kHz RC Startup Time for clock stabilization (software loop).



Switch from 32768 Hz oscillator to internal RC by setting the bit OSCSEL to 0.



Wait 5 slow clock cycles for internal resynchronization.



Disable the 32768 Hz oscillator by setting the bit OSC32EN to 0.



Switch the master clock back to the slow clock domain