Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
27.3
EBI Block Diagram
Figure 27-1.  Organization of the External Bus Interface
External Bus Interface
D[15:0]
A[15:2], A19
PIO
MUX
Logic
User Interface
Chip Select
 Assignor
Static
Memory
Controller
DDR2
LPDDR
SDRAM
Controller
Bus Matrix
APB
AHB
Address Decoders
A16/BA0
A0/NBS0
A1/NWR2/NBS2/DQM2
A17/BA1
NCS0
NRD
NCS1/SDCS
NWR0/NWE
NWR1/NBS1
NWR3/NBS3/DQM3
SDCK, SDCK#, SDCKE
DQM[1:0]
DQS[1:0]
RAS, CAS
SDWE, SDA10
D[31:16]
A[25:20]
NCS4
NCS5
NCS2
NWAIT
NANDOE
NANDWE
NAND Flash
Logic
PMECC
PMERRLOC
Controllers
A21/NANDALE
A22/NANDCLE
NCS3/NANDCS
A18/BA2