Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
326
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
27.8.7  8-bit NAND Flash with NFD0_ON_D16 = 1
27.8.7.1 Hardware Configuration
Figure 27-12. 8-bit NAND Flash with NFD0_ON_D16 = 1
27.8.7.2 Software Configuration 
The following configuration has to be performed:
Set NFD0_ON_D16 = 1 in the EBI Chip Select Assignment Register located in the bus matrix memory space.
Assign the EBI CS3 to the NAND Flash by setting the bit EBI_CS3A in the EBI Chip Select Assignment Register.
Configure the PIOD controller to assign the required PIOD[23..0] to EBI function.
Reserve A21 / A22 for ALE / CLE functions. Address and Command Latches are controlled respectively by setting 
to 1 the address bit A21 and A22 during accesses.
Configure a PIO line as an input to manage the Ready/Busy signal. 
Configure Static Memory Controller CS3 Setup, Pulse, Cycle and Mode accordingly to NAND Flash timings, the 
data bus width and the system bus frequency.