Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
334
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
28.4.1.1 SLC/MLC Write Operation with Spare Enable Bit Set
When the SPAREEN field of the PMECC_CFG register is set to one, the spare area of the page is encoded with the
stream of data of the last sector of the page. This mode is entered by writing one in the DATA field of the PMECC_CTRL
register. When the encoding process is over, the redundancy is written to the spare area in user mode, USER field of the
PMECC_CTRL must be set to one.
stream of data of the last sector of the page. This mode is entered by writing one in the DATA field of the PMECC_CTRL
register. When the encoding process is over, the redundancy is written to the spare area in user mode, USER field of the
PMECC_CTRL must be set to one.
Figure 28-3. NAND Write Operation with Spare Encoding
28.4.1.2 MLC/SLC Write Operation with Spare Area Disabled
When the SPAREEN field of PMECC_CFG is set to zero the spare area is not encoded with the stream of data. This
mode is entered by writing one to the DATA field of the PMECC_CTRL register.
mode is entered by writing one to the DATA field of the PMECC_CTRL register.
Figure 28-4. NAND Write Operation
Sector 0
512 or 1024 bytes
Sector 1
Sector 2
Sector 3
Spare
pagesize = n * sectorsize
sparesize
ecc_area
start_addr
end_addr
ECC computation enable signal
Write NAND operation with SPAREEN set to one
Sector 0
512 or 1024 bytes
Sector 1
Sector 2
Sector 3
pagesize = n * sectorsize
ECC computation enable signal
Write NAND operation with SPAREEN set to zero