Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
335
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
28.4.2  MLC/SLC Read Page Operation using PMECC
28.4.2.1 MLC/SLC Read Operation with Spare Decoding
When the spare area is protected, the spare area contains valid data. As the redundancy may be included in the middle
of the information stream, the user programs the start address and the end address of the ECC area. The controller will
automatically skip the ECC area. This mode is entered by writing one in the DATA field of the PMECC_CTRL register.
When the page has been fully retrieved from NAND, the ECC area is read using the user mode by writing one to the
USER field of the PMECC_CTRL register.
Figure 28-5.  Read Operation with Spare Decoding
Table 28-3. Relevant Remainders Registers
BCH_ERR field
Sector size set to 512 bytes
Sector size set to 1024 bytes
0
PMECC_REM0
PMECC_REM0
1
PMECC_REM0, PMECC_REM1
PMECC_REM0, PMECC_REM1
2
PMECC_REM0, PMECC_REM1, 
PMECC_REM2, PMECC_REM3,
PMECC_REM0, PMECC_REM1, 
PMECC_REM2, PMECC_REM3
3
PMECC_REM0, PMECC_REM1, 
PMECC_REM2, PMECC_REM3, 
PMECC_REM4, PMECC_REM5, 
PMECC_REM6, PMECC_REM7
PMECC_REM0, PMECC_REM1, 
PMECC_REM2, PMECC_REM3, 
PMECC_REM4, PMECC_REM5, 
PMECC_REM6, PMECC_REM7
4
PMECC_REM0, PMECC_REM1, 
PMECC_REM2, PMECC_REM3, 
PMECC_REM4, PMECC_REM5, 
PMECC_REM6, PMECC_REM7, 
PMECC_REM8, PMECC_REM9, 
PMECC_REM10, PMECC_REM11
PMECC_REM0, PMECC_REM1, 
PMECC_REM2, PMECC_REM3, 
PMECC_REM4, PMECC_REM5, 
PMECC_REM6, PMECC_REM7, 
PMECC_REM8, PMECC_REM9, 
PMECC_REM10, PMECC_REM11
Sector 0
512 or 1024 bytes
Sector 1
Sector 2
Sector 3
Spare
pagesize = n * sectorsize
sparesize
ecc_area
start_addr
end_addr
Remainder computation enable signal
Read NAND operation with SPAREEN set to One and AUTO set to Zero