Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
392
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 30-22. TDF Optimization: No TDF wait states are inserted if the TDF period is over when the next access begins
30.11.3 TDF Optimization Disabled (TDF_MODE = 0)
When optimization is disabled, tdf wait states are inserted at the end of the read transfer, so that the data float period is
ended when the second access begins. If the hold period of the read1 controlling signal overlaps the data float period, no
additional tdf wait states will be inserted.
 illustrate the cases:
read access followed by a read access on another chip select,
read access followed by a write access on another chip select,
read access followed by a write access on the same chip select,
with no TDF optimization. 
A
[25:2]
NCS0
MCK
NRD
NWE
D[31:0]
Read to Write 
Wait State
TDF_CYCLES = 6
read access on NCS0 (NRD controlled) 
NRD_HOLD= 4
NWE_SETUP= 3
write access on NCS0 (NWE controlled)