Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
43
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
9.5
CP15 Coprocessor
Coprocessor 15, or System Control Coprocessor CP15, is used to configure and control all the items in the list below:
ARM9EJ-S
Caches (ICache, DCache and write buffer)
TCM
MMU
Other system options
To control these features, CP15 provides 16 additional registers. See
Notes: 1.
Register locations 0,5, and 13 each provide access to more than one register. The register accessed
depends on the value of the opcode_2 field.
depends on the value of the opcode_2 field.
2.
Register location 9 provides access to more than one register. The register accessed depends on the value
of the CRm field.
of the CRm field.
Table 9-5.
CP15 Registers
Register
Name
Read/Write
0
ID Code
Read/Unpredictable
0
Cache type
Read/Unpredictable
0
TCM status
Read/Unpredictable
1
Control
Read/write
2
Translation Table Base
Read/write
3 Domain
Access
Control
Read/write
4 Reserved
None
5
Data fault Status
Read/write
5
Instruction fault status
Read/write
6
Fault Address
Read/write
7
Cache Operations
Read/Write
8
TLB operations
Unpredictable/Write
9
cache lockdown
Read/write
9
TCM region
Read/write
10
TLB lockdown
Read/write
11
Reserved
None
12
Reserved
None
13
FCSE PID
Read/write
13
Context ID
Read/Write
14 Reserved
None
15 Test
configuration
Read/Write