Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

488

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13



There must not be any write operation to Channel registers in an active channel after the channel enable is made 
HIGH. If any channel parameters must be reprogrammed, this can only be done after disabling the DMAC 
channel.



You must program the DMAC_SADDRx and DMAC_DADDRx channel registers with a byte, half-word and word 
aligned address depending on the source width and destination width.



After the software disables a channel by writing into the channel disable register, it must re-enable the channel 
only after it has polled a 0 in the corresponding channel enable status register. This is because the current AHB 
Burst must terminate properly.



If you program the BTSIZE field in the DMAC_CTRLA as zero, and the DMAC has been defined as the flow 
controller, then the channel is automatically disabled.



When hardware handshaking interface protocol is fully implemented, a peripheral is expected to deassert any sreq 
or breq signals on receiving the ack signal irrespective of the request the ack was asserted in response to.



Multiple Transfers involving the same peripheral must not be programmed and enabled on different channels, 
unless this peripheral integrates several hardware handshaking interfaces.



When a Peripheral has been defined as the flow controller, the targeted DMAC Channel must be enabled before 
the Peripheral. If you do not ensure this and the First DMAC request is also the last transfer, the DMAC Channel 
might miss a Last Transfer Flag.



When the AUTO Field is set to TRUE, then the BTSIZE Field is automatically reloaded from its previous value. 
BTSIZE must be initialized to a non zero value if the first transfer is initiated with the AUTO field set to TRUE, even 
if LLI mode is enabled, because the LLI fetch operation will not update this field.