Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
499
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
32.8.9 DMAC Error, Buffer Transfer and Chained Buffer Transfer Status Register
Name:
DMAC_EBCISR
Address:
0xFFFFEC24
Access:
Read-only
Reset:
0x00000000
• BTCx: Buffer Transfer Completed [7:0]
When BTC[i] is set, Channel i buffer transfer has terminated.
• CBTCx: Chained Buffer Transfer Completed [7:0]
When CBTC[i] is set, Channel i Chained buffer has terminated. LLI Fetch operation is disabled.
• ERRx: Access Error [7:0]
When ERR[i] is set, Channel i has detected an AHB Read or Write Error Access.
• DICERRx: Descriptor Integrity Check Error [7:0]
When DICERR[i] is set, Channel i has detected a Descriptor Integrity Check Error.
31
30
29
28
27
26
25
24
DICERR7
DICERR6
DICERR5
DICERR4
DICERR3
DICERR2
DICERR1
DICERR0
23
22
21
20
19
18
17
16
ERR7
ERR6
ERR5
ERR4
ERR3
ERR2
ERR1
ERR0
15
14
13
12
11
10
9
8
CBTC7
CBTC6
CBTC5
CBTC4
CBTC3
CBTC2
CBTC1
CBTC0
7
6
5
4
3
2
1
0
BTC7
BTC6
BTC5
BTC4
BTC3
BTC2
BTC1
BTC0