Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
500
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
32.8.10 DMAC Channel Handler Enable Register
Name: DMAC_CHER
Address:
0xFFFFEC28
Access:
Write-only
Reset:
0x00000000
• ENAx: Enable [7:0]
When set, a bit of the ENA field enables the relevant channel.
• SUSPx: Suspend [7:0]
When set, a bit of the SUSP field freezes the relevant channel and its current context.
• KEEPx: Keep on [7:0]
When set, a bit of the KEEP field resumes the current channel from an automatic stall state.
31
30
29
28
27
26
25
24
KEEP7
KEEP6
KEEP5
KEEP4
KEEP3
KEEP2
KEEP1
KEEP0
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
SUSP7
SUSP6
SUSP5
SUSP4
SUSP3
SUSP2
SUSP1
SUSP0
7
6
5
4
3
2
1
0
ENA7
ENA6
ENA5
ENA4
ENA3
ENA2
ENA1
ENA0