Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
605
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
35.14.13 HSMCI Interrupt Enable Register
Name: HSMCI_IER
Address:
0xF0008044
Access: Write-only 
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Enables the corresponding interrupt.
• CMDRDY: Command Ready Interrupt Enable
• RXRDY: Receiver Ready Interrupt Enable
• TXRDY:  Transmit Ready Interrupt Enable
• BLKE: Data Block Ended Interrupt Enable
• DTIP:  Data  Transfer in Progress Interrupt Enable
• NOTBUSY: Data Not Busy Interrupt Enable
• SDIOIRQA: SDIO Interrupt for Slot A Interrupt Enable
• SDIOWAIT: SDIO Read Wait Operation Status Interrupt Enable
• CSRCV: Completion Signal Received Interrupt Enable
• RINDE: Response Index Error Interrupt Enable
• RDIRE: Response Direction Error Interrupt Enable
• RCRCE: Response CRC Error Interrupt Enable
• RENDE: Response End Bit Error Interrupt Enable
• RTOE:  Response Time-out Error Interrupt Enable
• DCRCE: Data CRC Error Interrupt Enable
• DTOE: Data Time-out Error Interrupt Enable
• CSTOE: Completion Signal Timeout Error Interrupt Enable
31
30
29
28
27
26
25
24
UNRE
OVRE
ACKRCVE
ACKRCV
XFRDONE
FIFOEMPTY
DMADONE
BLKOVRE
23
22
21
20
19
18
17
16
CSTOE
DTOE
DCRCE
RTOE
RENDE
RCRCE
RDIRE
RINDE
15
14
13
12
11
10
9
8
CSRCV
SDIOWAIT
SDIOIRQA
7
6
5
4
3
2
1
0
NOTBUSY
DTIP
BLKE
TXRDY
RXRDY
CMDRDY