Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
607
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
35.14.14 HSMCI Interrupt Disable Register
Name: HSMCI_IDR
Address:
0xF0008048
Access: Write-only
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
• CMDRDY: Command Ready Interrupt Disable
• RXRDY: Receiver Ready Interrupt Disable
• TXRDY: Transmit Ready Interrupt Disable
• BLKE: Data Block Ended Interrupt Disable
• DTIP: Data Transfer in Progress Interrupt Disable
• NOTBUSY: Data Not Busy Interrupt Disable
• SDIOIRQA: SDIO Interrupt for Slot A Interrupt Disable
• SDIOWAIT: SDIO Read Wait Operation Status Interrupt Disable
• CSRCV: Completion Signal received interrupt Disable
• RINDE: Response Index Error Interrupt Disable
• RDIRE: Response Direction Error Interrupt Disable
• RCRCE: Response CRC Error Interrupt Disable
• RENDE: Response End Bit Error Interrupt Disable
• RTOE: Response Time-out Error Interrupt Disable
• DCRCE: Data CRC Error Interrupt Disable
• DTOE: Data Time-out Error Interrupt Disable
• CSTOE: Completion Signal Time out Error Interrupt Disable
31
30
29
28
27
26
25
24
UNRE
OVRE
ACKRCVE
ACKRCV
XFRDONE
FIFOEMPTY
DMADONE
BLKOVRE
23
22
21
20
19
18
17
16
CSTOE
DTOE
DCRCE
RTOE
RENDE
RCRCE
RDIRE
RINDE
15
14
13
12
11
10
9
8
–
–
CSRCV
SDIOWAIT
–
–
–
SDIOIRQA
7
6
5
4
3
2
1
0
–
–
NOTBUSY
DTIP
BLKE
TXRDY
RXRDY
CMDRDY