Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

68

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

AIC_SMR0..AIC_SMR31

0xFFFFF000

Read-write

0x0 

This register can only be written if the WPEN bit is cleared in 

The priority level is programmable from 0 (lowest priority) to 7 (highest priority).

The priority level is not used for the FIQ in the related SMR register AIC_SMR0.

The active level or edge is not programmable for the internal interrupt sources. 

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

SRCTYPE

–

–

PRIOR

0x0

INT_LEVEL_SENSITIVE

High level Sensitive for internal source

Low level Sensitive for external source

0x1

INT_EDGE_TRIGGERED

Positive edge triggered for internal source

Negative edge triggered for external source

0x2

EXT_HIGH_LEVEL

High level Sensitive for internal source

High level Sensitive for external source

0x3

EXT_POSITIVE_EDGE

Positive edge triggered for internal source

Positive edge triggered for external source