Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
703
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
38.7.12 PWM Channel Counter Register
Name:
PWM_CCNT[0..3]
Address:
0xF803420C [0], 0xF803422C [1], 0xF803424C [2], 0xF803426C [3]
Access:
Read-only
• CNT: Channel Counter Register
Internal counter value. This register is reset when:
the channel is enabled (writing CHIDx in the PWM_ENA register).
the counter reaches CPRD value defined in the PWM_CPRDx register if the waveform is left aligned.
31
30
29
28
27
26
25
24
CNT
23
22
21
20
19
18
17
16
CNT
15
14
13
12
11
10
9
8
CNT
7
6
5
4
3
2
1
0
CNT