Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
723
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
39.9
Multi-master Mode
39.9.1 Definition
More than one master may handle the bus at the same time without data corruption by using arbitration. 
Arbitration starts as soon as two or more masters place information on the bus at the same time, and stops (arbitration is
lost) for the master that intends to send a logical one while the other master sends a logical zero.
As soon as arbitration is lost by a master, it stops sending data and listens to the bus in order to detect a stop. When the
stop is detected, the master who has lost arbitration may put its data on the bus by respecting arbitration.
Arbitration is illustrated in 
39.9.2 Different 
Multi-master Modes
Two multi-master modes may be distinguished:
1.
TWI is considered as a Master only and will never be addressed.
2.
TWI may be either a Master or a Slave and may be addressed.
Note:
In both Multi-master modes arbitration is supported.
39.9.2.1 TWI as Master Only
In this mode, TWI is considered as a Master only (MSEN is always at one) and must be driven like a Master with the
ARBLST (ARBitration Lost) flag in addition.
If arbitration is lost (ARBLST = 1), the programmer must reinitiate the data transfer.
If the user starts a transfer (ex.: DADR + START + W + Write in THR) and if the bus is busy, the TWI automatically waits
for a STOP condition on the bus to initiate the transfer (see 
). 
Note:
The state of the bus (busy or free) is not indicated in the user interface.
39.9.2.2 TWI as Master or Slave
The automatic reversal from Master to Slave is not supported in case of a lost arbitration.
Then, in the case where TWI may be either a Master or a Slave, the programmer must manage the pseudo Multi-master
mode described in the steps below.
1.
Program TWI in Slave mode (SADR + MSDIS + SVEN) and perform Slave Access (if TWI is addressed).
2.
If TWI has to be set in Master mode, wait until TXCOMP flag is at 1.
3.
Program Master mode (DADR + SVDIS + MSEN) and start the transfer (ex: START + Write in THR). 
4.
As soon as the Master mode is enabled, TWI scans the bus in order to detect if it is busy or free. When the bus is 
considered as free, TWI initiates the transfer.
5.
As soon as the transfer is initiated and until a STOP condition is sent, the arbitration becomes relevant and the 
user must monitor the ARBLST flag.
6.
If the arbitration is lost (ARBLST is set to 1), the user must program the TWI in Slave mode in the case where the 
Master that won the arbitration wanted to access the TWI.
7.
If TWI has to be set in Slave mode, wait until TXCOMP flag is at 1 and then program the Slave mode.
Note:
In the case where the arbitration is lost and TWI is addressed, TWI will not acknowledge even if it is pro-
grammed in Slave mode as soon as ARBLST is set to 1. Then, the Master must repeat SADR.