Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
769
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 40-18. ASK Modulator Output
Figure 40-19. FSK Modulator Output
40.7.3.6 Synchronous Receiver
In synchronous mode (SYNC = 1), the receiver samples the RXD signal on each rising edge of the baud rate clock. If a
low level is detected, it is considered as a start. All data bits, the parity bit and the stop bits are sampled and the receiver
waits for the next start bit. Synchronous mode operations provide a high speed transfer capability.
low level is detected, it is considered as a start. All data bits, the parity bit and the stop bits are sampled and the receiver
waits for the next start bit. Synchronous mode operations provide a high speed transfer capability.
Configuration fields and bits are the same as in asynchronous mode.
Figure 40-20. Synchronous Mode Character Reception
Manchester
encoded
data
default polarity
unipolar output
Txd
ASK Modulator
Output
Uptstream Frequency F0
NRZ stream
1
0
0
1
Manchester
encoded
data
default polarity
unipolar output
Txd
FSK Modulator
Output
Uptstream Frequencies
[F0, F0+offset]
NRZ stream
1
0
0
1
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Start
Sampling
Parity Bit
Stop Bit
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Clock