Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
770
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
40.7.3.7 Receiver Operations
When a character reception is completed, it is transferred to the Receive Holding Register (US_RHR) and the RXRDY bit
in the US_CSR rises. If a character is completed while the RXRDY is set, the OVRE (Overrun Error) bit is set. The last
character is transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing the US_CR
with the RSTSTA (Reset Status) bit to 1.
in the US_CSR rises. If a character is completed while the RXRDY is set, the OVRE (Overrun Error) bit is set. The last
character is transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing the US_CR
with the RSTSTA (Reset Status) bit to 1.
Figure 40-21. Receiver Status
40.7.3.8 Parity
The USART supports five parity modes selected by writing to the PAR field in the US_MR. The PAR field also enables
the Multidrop mode, see
the Multidrop mode, see
. Even and odd parity bit generation and error detection are
supported.
If even parity is selected, the parity generator of the transmitter drives the parity bit to 0 if a number of 1s in the character
data bit is even, and to 1 if the number of 1s is odd. Accordingly, the receiver parity checker counts the number
of received 1s and reports a parity error if the sampled parity bit does not correspond. If odd parity is selected, the parity
generator of the transmitter drives the parity bit to 1 if a number of 1s in the character data bit is even, and to 0 if the
number of 1s is odd. Accordingly, the receiver parity checker counts the number of received 1s and reports a parity error
if the sampled parity bit does not correspond. If the mark parity is used, the parity generator of the transmitter drives the
parity bit to 1 for all characters. The receiver parity checker reports an error if the parity bit is sampled to 0. If the space
parity is used, the parity generator of the transmitter drives the parity bit to 0 for all characters. The receiver parity
checker reports an error if the parity bit is sampled to 1. If parity is disabled, the transmitter does not generate any parity
bit and the receiver does not report any parity error.
data bit is even, and to 1 if the number of 1s is odd. Accordingly, the receiver parity checker counts the number
of received 1s and reports a parity error if the sampled parity bit does not correspond. If odd parity is selected, the parity
generator of the transmitter drives the parity bit to 1 if a number of 1s in the character data bit is even, and to 0 if the
number of 1s is odd. Accordingly, the receiver parity checker counts the number of received 1s and reports a parity error
if the sampled parity bit does not correspond. If the mark parity is used, the parity generator of the transmitter drives the
parity bit to 1 for all characters. The receiver parity checker reports an error if the parity bit is sampled to 0. If the space
parity is used, the parity generator of the transmitter drives the parity bit to 0 for all characters. The receiver parity
checker reports an error if the parity bit is sampled to 1. If parity is disabled, the transmitter does not generate any parity
bit and the receiver does not report any parity error.
shows an example of the parity bit for the character 0x41 (character ASCII “A”) depending on the
configuration of the USART. Because there are two bits to 1, 1 bit is added when a parity is odd, or 0 is added when
a parity is even.
a parity is even.
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Start
Bit
Parity
Bit
Stop
Bit
Baud Rate
Clock
Write
US_CR
RXRDY
OVRE
D0
D1
D2
D3
D4
D5
D6
D7
Start
Bit
Parity
Bit
Stop
Bit
RSTSTA = 1
Read
US_RHR
Table 40-8. Parity Bit Examples
Character
Hexadecimal
Binary
Parity Bit
Parity Mode
A
0x41
0100 0001
1
Odd
A
0x41
0100 0001
0
Even
A
0x41
0100 0001
1
Mark
A
0x41
0100 0001
0
Space
A
0x41
0100 0001
None
None