Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
815
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
40.8.8 USART Interrupt Disable Register
Name:
US_IDR
Addresses:
0xF801C00C (0), 0xF802000C (1), 0xF802400C (2), 0xF802800C (3)
Access:
Write-only
For SPI specific configuration, see
.
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
• RXRDY: RXRDY Interrupt Disable
• TXRDY: TXRDY Interrupt Disable
• RXBRK: Receiver Break Interrupt Disable
• OVRE: Overrun Error Interrupt Enable
• FRAME: Framing Error Interrupt Disable
• PARE: Parity Error Interrupt Disable
• TIMEOUT: Time-out Interrupt Disable
• TXEMPTY: TXEMPTY Interrupt Disable
• ITER: Max Number of Repetitions Reached Interrupt Disable
• NACK: Non Acknowledge Interrupt Disable
• CTSIC: Clear to Send Input Change Interrupt Disable
• MANE: Manchester Error Interrupt Disable
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
MANE
23
22
21
20
19
18
17
16
–
–
–
–
CTSIC
–
–
–
15
14
13
12
11
10
9
8
–
–
NACK
–
–
ITER
TXEMPTY
TIMEOUT
7
6
5
4
3
2
1
0
PARE
FRAME
OVRE
–
–
RXBRK
TXRDY
RXRDY